:: Library Catalog

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Xehetasun bibliografikoak
Egile Nagusiak:	Mutlu, Onur, Ghose, Saugata, Gómez-Luna, Juan, Ausavarungnirun, Rachata, Sadrosadati, Mohammad, Oliveira, Geraldo F.
Formatua:	Preprint
Argitaratua:	2020
Gaiak:	Hardware Architecture Distributed, Parallel, and Cluster Computing
Sarrera elektronikoa:	https://arxiv.org/abs/2012.03112
Etiketak:	Etiketa erantsi Etiketarik gabe, Izan zaitez lehena erregistro honi etiketa jartzen!

Antzeko izenburuak

PIMDAL: Mitigating the Memory Bottleneck in Data Analytics using a Real Processing-in-Memory System
nork: Frouzakis, Manos, et al.
Argitaratua: (2025)

RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory
nork: Ghiasi, Nika Mansouri, et al.
Argitaratua: (2022)

MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Processing
nork: Oliveira, Geraldo F., et al.
Argitaratua: (2024)

Proteus: Enabling High-Performance Processing-Using-DRAM with Dynamic Bit-Precision, Adaptive Data Representation, and Flexible Arithmetic
nork: Oliveira, Geraldo F., et al.
Argitaratua: (2025)

Accelerating Triangle Counting with Real Processing-in-Memory Systems
nork: Asquini, Lorenzo, et al.
Argitaratua: (2025)

ALPHA-PIM: Analysis of Linear Algebraic Processing for High-Performance Graph Applications on a Real Processing-In-Memory System
nork: Barkhordar, Marzieh, et al.
Argitaratua: (2026)

Memory-Centric Computing: Recent Advances in Processing-in-DRAM
nork: Mutlu, Onur, et al.
Argitaratua: (2024)

General-Purpose Multicore Architectures
nork: Ghose, Saugata
Argitaratua: (2024)

Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
nork: Yuksel, Ismail Emir, et al.
Argitaratua: (2024)

Taking Cryptography Out of the Data Path via Near-Memory Processing in DRAM
nork: Barcarolo, Nicola, et al.
Argitaratua: (2026)

PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips
nork: Yuksel, Ismail Emir, et al.
Argitaratua: (2023)

Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
nork: Yuksel, Ismail Emir, et al.
Argitaratua: (2024)

New Tools, Programming Models, and System Support for Processing-in-Memory Architectures
nork: Oliveira, Geraldo F.
Argitaratua: (2025)

PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architectures
nork: Giannoula, Christina, et al.
Argitaratua: (2024)

PIM-Opt: Demystifying Distributed Optimization Algorithms on a Real-World Processing-In-Memory System
nork: Rhyner, Steve, et al.
Argitaratua: (2024)

DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architectures
nork: Yang, Peiming, et al.
Argitaratua: (2025)

PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System
nork: He, Yintao, et al.
Argitaratua: (2025)

In-DRAM True Random Number Generation Using Simultaneous Multiple-Row Activation: An Experimental Study of Real DRAM Chips
nork: Yuksel, Ismail Emir, et al.
Argitaratua: (2025)

Memory-Centric Computing: Solving Computing's Memory Problem
nork: Mutlu, Onur, et al.
Argitaratua: (2025)

CIPHERMATCH: Accelerating Homomorphic Encryption-Based String Matching via Memory-Efficient Data Packing and In-Flash Processing
nork: Kabra, Mayank, et al.
Argitaratua: (2025)

Conduit: Programmer-Transparent Near-Data Processing Using Multiple Compute-Capable Resources in Solid State Drives
nork: Nadig, Rakesh, et al.
Argitaratua: (2026)

MegIS: High-Performance, Energy-Efficient, and Low-Cost Metagenomic Analysis with In-Storage Processing
nork: Ghiasi, Nika Mansouri, et al.
Argitaratua: (2024)

SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Sequence Analysis
nork: Ghiasi, Nika Mansouri, et al.
Argitaratua: (2025)

pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables
nork: Ferreira, João Dinis, et al.
Argitaratua: (2021)

Athena: Synergizing Data Prefetching and Off-Chip Prediction via Online Reinforcement Learning
nork: Bera, Rahul, et al.
Argitaratua: (2026)

Balanced Data Placement for GEMV Acceleration with Processing-In-Memory
nork: Ibrahim, Mohamed Assem, et al.
Argitaratua: (2024)

RUBICON: A Framework for Designing Efficient Deep Learning-Based Genomic Basecallers
nork: Singh, Gagandeep, et al.
Argitaratua: (2022)

PAM: Processing Across Memory Hierarchy for Efficient KV-centric LLM Serving System
nork: Liu, Lian, et al.
Argitaratua: (2026)

RAPID-Graph: Recursive All-Pairs Shortest Paths Using Processing-in-Memory for Dynamic Programming on Graphs
nork: Chen, Yanru, et al.
Argitaratua: (2025)

Machine Learning-Driven Intelligent Memory System Design: From On-Chip Caches to Storage
nork: Bera, Rahul, et al.
Argitaratua: (2026)

Microbenchmark-Driven Analytical Performance Modeling Across Modern GPU Architectures
nork: Jarmusch, Aaron, et al.
Argitaratua: (2026)

Analyzing a Two-Tier Disaggregated Memory Protection Scheme Based on Memory Replication
nork: Volos, Haris, et al.
Argitaratua: (2025)

Scheduling Techniques of AI Models on Modern Heterogeneous Edge GPU -- A Critical Review
nork: Majeed, Ashiyana Abdul, et al.
Argitaratua: (2025)

PIUMA: Programmable Integrated Unified Memory Architecture
nork: Aananthakrishnan, Sriram, et al.
Argitaratua: (2020)

Efficient Architecture for RISC-V Vector Memory Access
nork: Guan, Hongyi, et al.
Argitaratua: (2025)

FengHuang: Next-Generation Memory Orchestration for AI Inferencing
nork: Li, Jiamin, et al.
Argitaratua: (2025)

Handling of Memory Page Faults during Virtual-Address RDMA
nork: Psistakis, Antonis
Argitaratua: (2025)

Pooling Engram Conditional Memory in Large Language Models using CXL
nork: Ma, Ruiyang, et al.
Argitaratua: (2026)

Optimizing Task Scheduling in Fog Computing with Deadline Awareness
nork: Sirjani, Mohammad Sadegh, et al.
Argitaratua: (2025)

TeraPool: A Physical Design Aware, 1024 RISC-V Cores Shared-L1-Memory Scaled-up Cluster Design with High Bandwidth Main Memory Link
nork: Zhang, Yichao, et al.
Argitaratua: (2026)