:: Library Catalog

Ata uhi

I tiakina i:

Ngā taipitopito rārangi puna kōrero
Ngā kaituhi matua:	Scherer, Moritz, Macan, Luka, Jung, Victor, Wiese, Philip, Bompani, Luca, Burrello, Alessio, Conti, Francesco, Benini, Luca
Hōputu:	Preprint
I whakaputaina:	2024
Ngā marau:	Machine Learning Hardware Architecture
Urunga tuihono:	https://arxiv.org/abs/2408.04413
Ngā Tūtohu:	Tāpirihia he Tūtohu Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!

Ngā tūemi rite

Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow
mā: Wiese, Philip, me ētahi atu.
I whakaputaina: (2024)

TrainDeeploy: Hardware-Accelerated Parameter-Efficient Fine-Tuning of Small Transformer Models at the Extreme Edge
mā: Wang, Run, me ētahi atu.
I whakaputaina: (2026)

Fused-Tiled Layers: Minimizing Data Movement on RISC-V SoCs with Software-Managed Caches
mā: Jung, Victor J. B., me ētahi atu.
I whakaputaina: (2025)

BioTrain: Sub-MB, Sub-50mW On-Device Fine-Tuning for Edge-AI on Biosignals
mā: Wang, Run, me ētahi atu.
I whakaputaina: (2026)

MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs
mā: Russo, Enrico, me ētahi atu.
I whakaputaina: (2026)

Circuits and Systems for Embodied AI: Exploring uJ Multi-Modal Perception for Nano-UAVs on the Kraken Shield
mā: Potocnik, Viviane, me ētahi atu.
I whakaputaina: (2024)

xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems
mā: Rutishauser, Georg, me ētahi atu.
I whakaputaina: (2024)

Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm
mā: Rogenmoser, Michael, me ētahi atu.
I whakaputaina: (2023)

CHIMERA: A Flexible and Scalable 3.1 TOPS/W AI-MCU with Transformer Accelerator and 563 Gb/s Shared-L2 Memory Subsystem with QoS Guarantees
mā: Leone, Lorenzo, me ētahi atu.
I whakaputaina: (2026)

ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers
mā: İslamoğlu, Gamze, me ētahi atu.
I whakaputaina: (2023)

Distributed Inference with Minimal Off-Chip Traffic for Transformers on Low-Power MCUs
mā: Bochem, Severin, me ētahi atu.
I whakaputaina: (2024)

Dual-Issue Execution of Mixed Integer and Floating-Point Workloads on Energy-Efficient In-Order RISC-V Cores
mā: Colagrande, Luca, me ētahi atu.
I whakaputaina: (2025)

MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
mā: İslamoğlu, Gamze, me ētahi atu.
I whakaputaina: (2025)

TOP: Towards Open & Predictable Heterogeneous SoCs
mā: Valente, Luca, me ētahi atu.
I whakaputaina: (2024)

Late Breaking Results: Boosting Efficient Dual-Issue Execution on Lightweight RISC-V Cores
mā: Colagrande, Luca, me ētahi atu.
I whakaputaina: (2026)

A Dynamic Allocation Scheme for Adaptive Shared-Memory Mapping on Kilo-core RV Clusters for Attention-Based Model Deployment
mā: Wang, Bowen, me ētahi atu.
I whakaputaina: (2025)

Enabling Efficient Hybrid Systolic Computation in Shared L1-Memory Manycore Clusters
mā: Mazzola, Sergio, me ētahi atu.
I whakaputaina: (2024)

Sub-Millisecond Event-Based Eye Tracking on a Resource-Constrained Microcontroller
mā: Giordano, Marco, me ētahi atu.
I whakaputaina: (2025)

SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream Registers
mā: Scheffler, Paul, me ētahi atu.
I whakaputaina: (2024)

Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality with At-MRAM Neural Engine
mā: Prasad, Arpan Suravi, me ētahi atu.
I whakaputaina: (2023)

Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience
mā: Conti, Francesco, me ētahi atu.
I whakaputaina: (2024)

FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Efficient Multi-Head Attention on Tile-Based Many-PE Accelerators
mā: Zhang, Chi, me ētahi atu.
I whakaputaina: (2025)

Towards Zero-Stall Matrix Multiplication on Energy-Efficient RISC-V Clusters for Machine Learning Acceleration
mā: Colagrande, Luca, me ētahi atu.
I whakaputaina: (2025)

Optimizing Offload Performance in Heterogeneous MPSoCs
mā: Colagrande, Luca, me ētahi atu.
I whakaputaina: (2024)

A Multicast-Capable AXI Crossbar for Many-core Machine Learning Accelerators
mā: Colagrande, Luca, me ētahi atu.
I whakaputaina: (2025)

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures
mā: Curzel, Serena, me ētahi atu.
I whakaputaina: (2023)

A Flexible Template for Edge Generative AI with High-Accuracy Accelerated Softmax & GELU
mā: Belano, Andrea, me ētahi atu.
I whakaputaina: (2024)

Evaluating IOMMU-Based Shared Virtual Addressing for RISC-V Embedded Heterogeneous SoCs
mā: Koenig, Cyril, me ētahi atu.
I whakaputaina: (2025)

Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space
mā: Rogenmoser, Michael, me ētahi atu.
I whakaputaina: (2023)

Late Breaking Results: A RISC-V ISA Extension for Chaining in Scalar Processors
mā: Colagrande, Luca, me ētahi atu.
I whakaputaina: (2025)

LRSCwait: Enabling Scalable and Efficient Synchronization in Manycore Systems through Polling-Free and Retry-Free Operation
mā: Riedel, Samuel, me ētahi atu.
I whakaputaina: (2024)

MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication
mā: Perotti, Matteo, me ētahi atu.
I whakaputaina: (2024)

HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC
mā: Valente, Luca, me ētahi atu.
I whakaputaina: (2022)

RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine
mā: Wiese, Philip, me ētahi atu.
I whakaputaina: (2025)

FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Large Attention-Based Model Inference on Tile-Based Accelerators
mā: Zhang, Chi, me ētahi atu.
I whakaputaina: (2026)

VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers
mā: Wang, Run, me ētahi atu.
I whakaputaina: (2025)

relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication
mā: Rogenmoser, Michael, me ētahi atu.
I whakaputaina: (2025)

How to keep pushing ML accelerator performance? Know your rooflines!
mā: Verhelst, Marian, me ētahi atu.
I whakaputaina: (2025)

O-POPE: High-Frequency Pipelined Outer Product based GEMM acceleration with minimal buffering overhead
mā: Cammarata, Danilo, me ētahi atu.
I whakaputaina: (2026)

AraXL: A Physically Scalable, Ultra-Wide RISC-V Vector Processor Design for Fast and Efficient Computation on Long Vectors
mā: Purayil, Navaneeth Kunhi, me ētahi atu.
I whakaputaina: (2025)