Ngā tūemi rite

• Exploiting the Lock: Leveraging MiG-V's Logic Locking for Secret-Data Extraction
  mā: Reimann, Lennart M., me ētahi atu.
  I whakaputaina: (2024)
• QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware Hardware Design on RTL
  mā: Reimann, Lennart M., me ētahi atu.
  I whakaputaina: (2024)
• Automatic Microarchitecture-Aware Custom Instruction Design for RISC-V Processors
  mā: Rezunov, Evgenii, me ētahi atu.
  I whakaputaina: (2025)
• Utilizing Layout Effects for Analog Logic Locking
  mā: Aljafar, Muayad J., me ētahi atu.
  I whakaputaina: (2024)
• LLMs for Secure Hardware Design and Related Problems: Opportunities and Challenges
  mā: Knechtel, Johann, me ētahi atu.
  I whakaputaina: (2026)