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| Main Authors: | , |
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| Format: | Recurso digital |
| Language: | |
| Published: |
Zenodo
2020
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| Subjects: | |
| Online Access: | https://doi.org/10.5281/zenodo.19318984 |
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Table of Contents:
- <p>—The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication</p>