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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2019
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/1912.03507 |
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| _version_ | 1866909081682313216 |
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| author | Khan, Asif Ali Goens, Andres Hameed, Fazal Castrillon, Jeronimo |
| author_facet | Khan, Asif Ali Goens, Andres Hameed, Fazal Castrillon, Jeronimo |
| contents | Ultra-dense non-volatile racetrack memories (RTMs) have been investigated at various levels in the memory hierarchy for improved performance and reduced energy consumption. However, the innate shift operations in RTMs hinder their applicability to replace low-latency on-chip memories. Recent research has demonstrated that intelligent placement of memory objects in RTMs can significantly reduce the amount of shifts with no hardware overhead, albeit for specific system setups. However, existing placement strategies may lead to sub-optimal performance when applied to different architectures. In this paper we look at generalized data placement mechanisms that improve upon existing ones by taking into account the underlying memory architecture and the timing and liveliness information of memory objects. We propose a novel heuristic and a formulation using genetic algorithms that optimize key performance parameters. We show that, on average, our generalized approach improves the number of shifts, performance and energy consumption by 4.3x, 46% and 55% respectively compared to the state-of-the-art. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_1912_03507 |
| institution | arXiv |
| publishDate | 2019 |
| record_format | arxiv |
| spellingShingle | Generalized Data Placement Strategies for Racetrack Memories Khan, Asif Ali Goens, Andres Hameed, Fazal Castrillon, Jeronimo Distributed, Parallel, and Cluster Computing Ultra-dense non-volatile racetrack memories (RTMs) have been investigated at various levels in the memory hierarchy for improved performance and reduced energy consumption. However, the innate shift operations in RTMs hinder their applicability to replace low-latency on-chip memories. Recent research has demonstrated that intelligent placement of memory objects in RTMs can significantly reduce the amount of shifts with no hardware overhead, albeit for specific system setups. However, existing placement strategies may lead to sub-optimal performance when applied to different architectures. In this paper we look at generalized data placement mechanisms that improve upon existing ones by taking into account the underlying memory architecture and the timing and liveliness information of memory objects. We propose a novel heuristic and a formulation using genetic algorithms that optimize key performance parameters. We show that, on average, our generalized approach improves the number of shifts, performance and energy consumption by 4.3x, 46% and 55% respectively compared to the state-of-the-art. |
| title | Generalized Data Placement Strategies for Racetrack Memories |
| topic | Distributed, Parallel, and Cluster Computing |
| url | https://arxiv.org/abs/1912.03507 |