Highly optimized quantum circuits synthesized via data-flow engines

Fuente: arXiv
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Hauptverfasser: Rakyta, Peter, Morse, Gregory, Nádori, Jakab, Majnay-Takács, Zita, Mencer, Oskar, Zimborás, Zoltán
Format: Preprint
Veröffentlicht: 2022
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_version_ 1866911778589376512
author Rakyta, Peter
Morse, Gregory
Nádori, Jakab
Majnay-Takács, Zita
Mencer, Oskar
Zimborás, Zoltán
author_facet Rakyta, Peter
Morse, Gregory
Nádori, Jakab
Majnay-Takács, Zita
Mencer, Oskar
Zimborás, Zoltán
contents The formulation of quantum programs in terms of the fewest number of gate operations is crucial to retrieve meaningful results from the noisy quantum processors accessible these days. In this work, we demonstrate a use-case for Field Programmable Gate Array (FPGA) based data-flow engines (DFEs) to scale up variational quantum compilers to synthesize circuits up to $9$-qubit programs.This gate decomposer utilizes a newly developed DFE quantum computer simulator that is designed to simulate arbitrary quantum circuit consisting of single qubit rotations and controlled two-qubit gates on FPGA chips. In our benchmark with the QISKIT package, the depth of the circuits produced by the SQUANDER package (with the DFE accelerator support) were less by $97\%$ on average, while the fidelity of the circuits was still close to unity up to an error of $\sim10^{-4}$.
format Preprint
id arxiv_https___arxiv_org_abs_2211_07685
institution arXiv
publishDate 2022
record_format arxiv
spellingShingle Highly optimized quantum circuits synthesized via data-flow engines
Rakyta, Peter
Morse, Gregory
Nádori, Jakab
Majnay-Takács, Zita
Mencer, Oskar
Zimborás, Zoltán
Quantum Physics
Computational Physics
The formulation of quantum programs in terms of the fewest number of gate operations is crucial to retrieve meaningful results from the noisy quantum processors accessible these days. In this work, we demonstrate a use-case for Field Programmable Gate Array (FPGA) based data-flow engines (DFEs) to scale up variational quantum compilers to synthesize circuits up to $9$-qubit programs.This gate decomposer utilizes a newly developed DFE quantum computer simulator that is designed to simulate arbitrary quantum circuit consisting of single qubit rotations and controlled two-qubit gates on FPGA chips. In our benchmark with the QISKIT package, the depth of the circuits produced by the SQUANDER package (with the DFE accelerator support) were less by $97\%$ on average, while the fidelity of the circuits was still close to unity up to an error of $\sim10^{-4}$.
title Highly optimized quantum circuits synthesized via data-flow engines
topic Quantum Physics
Computational Physics
url https://arxiv.org/abs/2211.07685