Imagen de Portada

DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling

Fuente: arXiv

Guardado en:

Detalles Bibliográficos
Autores principales:	Mei, Linyan, Goetschalckx, Koen, Symons, Arne, Verhelst, Marian
Formato:	Preprint
Publicado:	2022
Materias:	Hardware Architecture Distributed, Parallel, and Cluster Computing
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

Ejemplares similares

CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories
por: Shi, Man, et al.
Publicado: (2024)

XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs
por: Kong, Fanchen, et al.
Publicado: (2025)

Torrent: A Distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement
por: Deng, Yunhao, et al.
Publicado: (2025)

DeepStack: Scalable and Accurate Design Space Exploration for Distributed 3D-Stacked AI Accelerators
por: Mo, Zhiwen, et al.
Publicado: (2026)

Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning
por: Russo, Enrico, et al.
Publicado: (2024)

A Survey of Real-time Scheduling on Accelerator-based Heterogeneous Architecture for Time Critical Applications
por: Zou, An, et al.
Publicado: (2025)

MLDSE: Scaling Design Space Exploration Infrastructure for Multi-Level Hardware
por: Qu, Huanyu, et al.
Publicado: (2025)

TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs
por: Prakriya, Neha, et al.
Publicado: (2023)

CCSS: Hardware-Accelerated RTL Simulation with Fast Combinational Logic Computing and Sequential Logic Synchronization
por: Feng, Weigang, et al.
Publicado: (2025)

MVDRAM: Enabling GeMV Execution in Unmodified DRAM for Low-Bit LLM Acceleration
por: Kubo, Tatsuya, et al.
Publicado: (2025)

Optimizing Task Scheduling in Fog Computing with Deadline Awareness
por: Sirjani, Mohammad Sadegh, et al.
Publicado: (2025)

CELLO: Co-designing Schedule and Hybrid Implicit/Explicit Buffer for Complex Tensor Reuse
por: Garg, Raveesh, et al.
Publicado: (2023)

Scheduling Techniques of AI Models on Modern Heterogeneous Edge GPU -- A Critical Review
por: Majeed, Ashiyana Abdul, et al.
Publicado: (2025)

Microbenchmark-Driven Analytical Performance Modeling Across Modern GPU Architectures
por: Jarmusch, Aaron, et al.
Publicado: (2026)

Sparse MTTKRP Acceleration for Tensor Decomposition on GPU
por: Wijeratne, Sasindu, et al.
Publicado: (2024)

Leveraging SIMD for Accelerating Large-number Arithmetic
por: Das, Subhrajit, et al.
Publicado: (2026)

Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems
por: Orenes-Vera, Marcelo, et al.
Publicado: (2023)

Accelerating Triangle Counting with Real Processing-in-Memory Systems
por: Asquini, Lorenzo, et al.
Publicado: (2025)

Balanced Data Placement for GEMV Acceleration with Processing-In-Memory
por: Ibrahim, Mohamed Assem, et al.
Publicado: (2024)

Kitsune: Enabling Dataflow Execution on GPUs
por: Davies, Michael, et al.
Publicado: (2025)

FpgaHub: Fpga-centric Hyper-heterogeneous Computing Platform for Big Data Analytics
por: Wang, Zeke, et al.
Publicado: (2025)

Accelerating Data Chunking in Deduplication Systems using Vector Instructions
por: Udayashankar, Sreeharsha, et al.
Publicado: (2025)

Accelerating MoE with Dynamic In-Switch Computing on Multi-GPUs
por: Zhang, Qijun, et al.
Publicado: (2026)

SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators
por: Jung, Victor J. B., et al.
Publicado: (2023)

Exploration of Cryptocurrency Mining-Specific GPUs in AI Applications: A Case Study of CMP 170HX
por: Kangwei, Xing
Publicado: (2025)

A Heterogeneous Chiplet Architecture for Accelerating End-to-End Transformer Models
por: Sharma, Harsh, et al.
Publicado: (2023)

Application Experiences on a GPU-Accelerated Arm-based HPC Testbed
por: Elwasif, Wael, et al.
Publicado: (2022)

Workload-Aware Hardware Accelerator Mining for Distributed Deep Learning Training
por: Adnan, Muhammad, et al.
Publicado: (2024)

Adaptive KV Cache Reuse for Fast Long-Context LLM Serving
por: li, Fei, et al.
Publicado: (2026)

Enabling Mixed criticality applications for the Versal AI-Engines
por: Sprave, Vincent, et al.
Publicado: (2026)

Design in Tiles: Automating GEMM Deployment on Tile-Based Many-PE Accelerators
por: Shen, Aofeng, et al.
Publicado: (2025)

FLEX: Leveraging FPGA-CPU Synergy for Mixed-Cell-Height Legalization Acceleration
por: Liu, Xingyu, et al.
Publicado: (2025)

JExplore: Design Space Exploration Tool for Nvidia Jetson Boards
por: Kutukcu, Basar, et al.
Publicado: (2025)

How Fast Can Graph Computations Go on Fine-grained Parallel Architectures
por: Wang, Yuqing, et al.
Publicado: (2025)

An Evaluation and Comparison of GPU Hardware and Solver Libraries for Accelerating the OPM Flow Reservoir Simulator
por: Qiu, Tong Dong, et al.
Publicado: (2023)

DiP: A Scalable, Energy-Efficient Systolic Array for Matrix Multiplication Acceleration
por: Abdelmaksoud, Ahmed J., et al.
Publicado: (2024)

EDEA: Efficient Dual-Engine Accelerator for Depthwise Separable Convolution with Direct Data Transfer
por: Chen, Yi, et al.
Publicado: (2025)

EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems
por: Malik, Arsalan Ali, et al.
Publicado: (2025)

DP-HLS: A High-Level Synthesis Framework for Accelerating Dynamic Programming Algorithms in Bioinformatics
por: Cao, Yingqi, et al.
Publicado: (2024)

A Lightweight High-Throughput Collective-Capable NoC for Large-Scale ML Accelerators
por: Colagrande, Luca, et al.
Publicado: (2026)