DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm
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arXiv
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| Main Authors: | , , , , , , |
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| Format: | Preprint |
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2023
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| _version_ | 1866909649356193792 |
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| author | Hong, Seungki Kim, Dongha Lee, Jaehyung Oh, Reum Yoo, Changsik Hwang, Sangjoon Lee, Jooyoung |
| author_facet | Hong, Seungki Kim, Dongha Lee, Jaehyung Oh, Reum Yoo, Changsik Hwang, Sangjoon Lee, Jooyoung |
| contents | This paper provides the fundamental mechanisms of two types of row activation-induced bit flips and proposes in-DRAM protection techniques. RowBleed occurs when a victim row experiences charge leakage due to transistor's threshold voltage lowering induced by long activation of a neighboring aggressor row. Therefore, this paper proposes Time-Weighted Counting for RowBleed mitigation, which assigns greater counter weights to rows that are activated for longer durations.
On the other hand, RowHammer occurs when a victim row experiences electron injection due to frequent activation of a neighboring aggressor row. Similarly, Extended RowHammer, the phenomenon where victim rows are two rows beyond aggressor rows, is also caused by electron injection due to frequent activation of a neighboring aggressor row. Consequently, accurate detection of aggressor rows is crucial. Therefore, this paper proposes RowHammer mitigation algorithm named DSAC (in-DRAM Stochastic and Approximate Counting algorithm), which utilizes a replacement probability that adjusts based on the count of the old row.
This paper introduces a RowHammer protection index called Maximum Disturbance, which measures the maximum accumulated number of row activations within an observation period. The experimental results demonstrate that DSAC can achieve 133x lower Maximum Disturbance than the state-of-the-art counter-based algorithm. |
| format | Preprint |
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arxiv_https___arxiv_org_abs_2302_03591 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm Hong, Seungki Kim, Dongha Lee, Jaehyung Oh, Reum Yoo, Changsik Hwang, Sangjoon Lee, Jooyoung Cryptography and Security Hardware Architecture This paper provides the fundamental mechanisms of two types of row activation-induced bit flips and proposes in-DRAM protection techniques. RowBleed occurs when a victim row experiences charge leakage due to transistor's threshold voltage lowering induced by long activation of a neighboring aggressor row. Therefore, this paper proposes Time-Weighted Counting for RowBleed mitigation, which assigns greater counter weights to rows that are activated for longer durations. On the other hand, RowHammer occurs when a victim row experiences electron injection due to frequent activation of a neighboring aggressor row. Similarly, Extended RowHammer, the phenomenon where victim rows are two rows beyond aggressor rows, is also caused by electron injection due to frequent activation of a neighboring aggressor row. Consequently, accurate detection of aggressor rows is crucial. Therefore, this paper proposes RowHammer mitigation algorithm named DSAC (in-DRAM Stochastic and Approximate Counting algorithm), which utilizes a replacement probability that adjusts based on the count of the old row. This paper introduces a RowHammer protection index called Maximum Disturbance, which measures the maximum accumulated number of row activations within an observation period. The experimental results demonstrate that DSAC can achieve 133x lower Maximum Disturbance than the state-of-the-art counter-based algorithm. |
| title | DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm |
| topic | Cryptography and Security Hardware Architecture |
| url | https://arxiv.org/abs/2302.03591 |