fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs
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arXiv
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| Main Authors: | , , |
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| Format: | Preprint |
| Published: |
2023
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| _version_ | 1866911788215304192 |
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| author | Toupas, Petros Bouganis, Christos-Savvas Tzovaras, Dimitrios |
| author_facet | Toupas, Petros Bouganis, Christos-Savvas Tzovaras, Dimitrios |
| contents | Surveillance systems, autonomous vehicles, human monitoring systems, and video retrieval are just few of the many applications in which 3D Convolutional Neural Networks are exploited. However, their extensive use is restricted by their high computational and memory requirements, especially when integrated into systems with limited resources. This study proposes a toolflow that optimises the mapping of 3D CNN models for Human Action Recognition onto FPGA devices, taking into account FPGA resources and off-chip memory characteristics. The proposed system employs Synchronous Dataflow (SDF) graphs to model the designs and introduces transformations to expand and explore the design space, resulting in high-throughput designs. A variety of 3D CNN models were evaluated using the proposed toolflow on multiple FPGA devices, demonstrating its potential to deliver competitive performance compared to earlier hand-tuned and model-specific designs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2305_19896 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs Toupas, Petros Bouganis, Christos-Savvas Tzovaras, Dimitrios Hardware Architecture Artificial Intelligence Computer Vision and Pattern Recognition Machine Learning Surveillance systems, autonomous vehicles, human monitoring systems, and video retrieval are just few of the many applications in which 3D Convolutional Neural Networks are exploited. However, their extensive use is restricted by their high computational and memory requirements, especially when integrated into systems with limited resources. This study proposes a toolflow that optimises the mapping of 3D CNN models for Human Action Recognition onto FPGA devices, taking into account FPGA resources and off-chip memory characteristics. The proposed system employs Synchronous Dataflow (SDF) graphs to model the designs and introduces transformations to expand and explore the design space, resulting in high-throughput designs. A variety of 3D CNN models were evaluated using the proposed toolflow on multiple FPGA devices, demonstrating its potential to deliver competitive performance compared to earlier hand-tuned and model-specific designs. |
| title | fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs |
| topic | Hardware Architecture Artificial Intelligence Computer Vision and Pattern Recognition Machine Learning |
| url | https://arxiv.org/abs/2305.19896 |