Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms
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arXiv
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| Auteurs principaux: | , , , , , , , , , , , |
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| Format: | Preprint |
| Publié: |
2023
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| _version_ | 1866911078684819456 |
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| author | Wang, Yun-Jie Zhang, Sheng Sun, Tai-Ping Zhao, Ze-An Xu, Xiao-Fan Zhuang, Xi-Ning Liu, Huan-Yu Xue, Cheng Duan, Peng Wu, Yu-Chun Chen, Zhao-Yun Guo, Guo-Ping |
| author_facet | Wang, Yun-Jie Zhang, Sheng Sun, Tai-Ping Zhao, Ze-An Xu, Xiao-Fan Zhuang, Xi-Ning Liu, Huan-Yu Xue, Cheng Duan, Peng Wu, Yu-Chun Chen, Zhao-Yun Guo, Guo-Ping |
| contents | Quantum Random Access Memory (QRAM) is a critical component for enabling data queries in superposition, which is the cornerstone of quantum algorithms. Among various QRAM architectures, the bucket-brigade model stands out due to its noise resilience. This paper presents a hardware-efficient native gate set {iSCZ, C-iSCZ} for implementing bucket-brigade QRAM on superconducting platforms. The experimental feasibility of the proposed gate set is demonstrated, showing high fidelity and reduced complexity. By leveraging the complementary control property in QRAM, our approach directly substitutes the conventional {SWAP, CSWAP} gates with the new gate set, eliminating decomposition overhead and significantly reducing circuit depth and gate count. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2306_10250 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms Wang, Yun-Jie Zhang, Sheng Sun, Tai-Ping Zhao, Ze-An Xu, Xiao-Fan Zhuang, Xi-Ning Liu, Huan-Yu Xue, Cheng Duan, Peng Wu, Yu-Chun Chen, Zhao-Yun Guo, Guo-Ping Quantum Physics Quantum Random Access Memory (QRAM) is a critical component for enabling data queries in superposition, which is the cornerstone of quantum algorithms. Among various QRAM architectures, the bucket-brigade model stands out due to its noise resilience. This paper presents a hardware-efficient native gate set {iSCZ, C-iSCZ} for implementing bucket-brigade QRAM on superconducting platforms. The experimental feasibility of the proposed gate set is demonstrated, showing high fidelity and reduced complexity. By leveraging the complementary control property in QRAM, our approach directly substitutes the conventional {SWAP, CSWAP} gates with the new gate set, eliminating decomposition overhead and significantly reducing circuit depth and gate count. |
| title | Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms |
| topic | Quantum Physics |
| url | https://arxiv.org/abs/2306.10250 |