TPU as Cryptographic Accelerator
Fuente:
arXiv
Saved in:
| Main Authors: | , , , , , , , , , , |
|---|---|
| Format: | Preprint |
| Published: |
2023
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866914962980470784 |
|---|---|
| author | Karanjai, Rabimba Shin, Sangwon Xiong, and Wujie Fan, Xinxin Chen, Lin Zhang, Tianwei Suh, Taeweon Shi, Weidong Kuchta, Veronika Sica, Francesco Xu, Lei |
| author_facet | Karanjai, Rabimba Shin, Sangwon Xiong, and Wujie Fan, Xinxin Chen, Lin Zhang, Tianwei Suh, Taeweon Shi, Weidong Kuchta, Veronika Sica, Francesco Xu, Lei |
| contents | Cryptographic schemes like Fully Homomorphic Encryption (FHE) and Zero-Knowledge Proofs (ZKPs), while offering powerful privacy-preserving capabilities, are often hindered by their computational complexity. Polynomial multiplication, a core operation in these schemes, is a major performance bottleneck. While algorithmic advancements and specialized hardware like GPUs and FPGAs have shown promise in accelerating these computations, the recent surge in AI accelerators (TPUs/NPUs) presents a new opportunity. This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes. We present techniques to adapt polynomial multiplication to these AI-centric architectures and provide a preliminary evaluation of their effectiveness. We also discuss current limitations and outline future directions for further performance improvements, paving the way for wider adoption of advanced cryptographic tools. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2307_06554 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | TPU as Cryptographic Accelerator Karanjai, Rabimba Shin, Sangwon Xiong, and Wujie Fan, Xinxin Chen, Lin Zhang, Tianwei Suh, Taeweon Shi, Weidong Kuchta, Veronika Sica, Francesco Xu, Lei Cryptography and Security E.3; C.0; F.2.2 Cryptographic schemes like Fully Homomorphic Encryption (FHE) and Zero-Knowledge Proofs (ZKPs), while offering powerful privacy-preserving capabilities, are often hindered by their computational complexity. Polynomial multiplication, a core operation in these schemes, is a major performance bottleneck. While algorithmic advancements and specialized hardware like GPUs and FPGAs have shown promise in accelerating these computations, the recent surge in AI accelerators (TPUs/NPUs) presents a new opportunity. This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes. We present techniques to adapt polynomial multiplication to these AI-centric architectures and provide a preliminary evaluation of their effectiveness. We also discuss current limitations and outline future directions for further performance improvements, paving the way for wider adoption of advanced cryptographic tools. |
| title | TPU as Cryptographic Accelerator |
| topic | Cryptography and Security E.3; C.0; F.2.2 |
| url | https://arxiv.org/abs/2307.06554 |