Unrolled and Pipelined Decoders based on Look-Up Tables for Polar Codes
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arXiv
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| Autori principali: | , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2023
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| _version_ | 1866909301715501056 |
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| author | Giard, Pascal Shah, Syed Aizaz Ali Balatsoukas-Stimming, Alexios Stark, Maximilian Bauch, Gerhard |
| author_facet | Giard, Pascal Shah, Syed Aizaz Ali Balatsoukas-Stimming, Alexios Stark, Maximilian Bauch, Gerhard |
| contents | Unrolling a decoding algorithm allows to achieve extremely high throughput at the cost of increased area. Look-up tables (LUTs) can be used to replace functions otherwise implemented as circuits. In this work, we show the impact of replacing blocks of logic by carefully crafted LUTs in unrolled decoders for polar codes. We show that using LUTs to improve key performance metrics (e.g., area, throughput, latency) may turn out more challenging than expected. We present three variants of LUT-based decoders and describe their inner workings as well as circuits in detail. The LUT-based decoders are compared against a regular unrolled decoder, employing fixed-point representations for numbers, with a comparable error-correction performance. A short systematic polar code is used as an illustration. All resulting unrolled decoders are shown to be capable of an information throughput of little under 10 Gbps in a 28 nm FD-SOI technology clocked in the vicinity of 1.4 GHz to 1.5 GHz. The best variant of our LUT-based decoders is shown to reduce the area requirements by 23% compared to the regular unrolled decoder while retaining a comparable error-correction performance. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2308_02394 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | Unrolled and Pipelined Decoders based on Look-Up Tables for Polar Codes Giard, Pascal Shah, Syed Aizaz Ali Balatsoukas-Stimming, Alexios Stark, Maximilian Bauch, Gerhard Information Theory Hardware Architecture Unrolling a decoding algorithm allows to achieve extremely high throughput at the cost of increased area. Look-up tables (LUTs) can be used to replace functions otherwise implemented as circuits. In this work, we show the impact of replacing blocks of logic by carefully crafted LUTs in unrolled decoders for polar codes. We show that using LUTs to improve key performance metrics (e.g., area, throughput, latency) may turn out more challenging than expected. We present three variants of LUT-based decoders and describe their inner workings as well as circuits in detail. The LUT-based decoders are compared against a regular unrolled decoder, employing fixed-point representations for numbers, with a comparable error-correction performance. A short systematic polar code is used as an illustration. All resulting unrolled decoders are shown to be capable of an information throughput of little under 10 Gbps in a 28 nm FD-SOI technology clocked in the vicinity of 1.4 GHz to 1.5 GHz. The best variant of our LUT-based decoders is shown to reduce the area requirements by 23% compared to the regular unrolled decoder while retaining a comparable error-correction performance. |
| title | Unrolled and Pipelined Decoders based on Look-Up Tables for Polar Codes |
| topic | Information Theory Hardware Architecture |
| url | https://arxiv.org/abs/2308.02394 |