CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion

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Hauptverfasser: Laukemann, Jan, Gruber, Thomas, Hager, Georg, Oryspayev, Dossay, Wellein, Gerhard
Format: Preprint
Veröffentlicht: 2023
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author Laukemann, Jan
Gruber, Thomas
Hager, Georg
Oryspayev, Dossay
Wellein, Gerhard
author_facet Laukemann, Jan
Gruber, Thomas
Hager, Georg
Oryspayev, Dossay
Wellein, Gerhard
contents In this paper we analyze the MPI-only version of the CloverLeaf code from the SPEChpc 2021 benchmark suite on recent Intel Xeon "Ice Lake" and "Sapphire Rapids" server CPUs. We observe peculiar breakdowns in performance when the number of processes is prime. Investigating this effect, we create first-principles data traffic models for each of the stencil-like hotspot loops. With application measurements and microbenchmarks to study memory data traffic behavior, we can connect the breakdowns to SpecI2M, a new write-allocate evasion feature in current Intel CPUs. For serial and full-node cases we are able to predict the memory data volume analytically with an error of a few percent. We find that if the number of processes is prime, SpecI2M fails to work properly, which we can attribute to short inner loops emerging from the one-dimensional domain decomposition in this case. We can also rule out other possible causes of the prime number effect, such as breaking layer conditions, MPI communication overhead, and load imbalance.
format Preprint
id arxiv_https___arxiv_org_abs_2311_04797
institution arXiv
publishDate 2023
record_format arxiv
spellingShingle CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion
Laukemann, Jan
Gruber, Thomas
Hager, Georg
Oryspayev, Dossay
Wellein, Gerhard
Distributed, Parallel, and Cluster Computing
Performance
In this paper we analyze the MPI-only version of the CloverLeaf code from the SPEChpc 2021 benchmark suite on recent Intel Xeon "Ice Lake" and "Sapphire Rapids" server CPUs. We observe peculiar breakdowns in performance when the number of processes is prime. Investigating this effect, we create first-principles data traffic models for each of the stencil-like hotspot loops. With application measurements and microbenchmarks to study memory data traffic behavior, we can connect the breakdowns to SpecI2M, a new write-allocate evasion feature in current Intel CPUs. For serial and full-node cases we are able to predict the memory data volume analytically with an error of a few percent. We find that if the number of processes is prime, SpecI2M fails to work properly, which we can attribute to short inner loops emerging from the one-dimensional domain decomposition in this case. We can also rule out other possible causes of the prime number effect, such as breaking layer conditions, MPI communication overhead, and load imbalance.
title CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion
topic Distributed, Parallel, and Cluster Computing
Performance
url https://arxiv.org/abs/2311.04797