Cover Image

A Lightweight Architecture for Real-Time Neuronal-Spike Classification

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Siddiqi, Muhammad Ali, Vrijenhoek, David, Landsmeer, Lennart P. L., van der Kleij, Job, Gebregiorgis, Anteneh, Romano, Vincenzo, Bishnoi, Rajendra, Hamdioui, Said, Strydis, Christos
Format:	Preprint
Published:	2023
Subjects:	Hardware Architecture Machine Learning Signal Processing
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Memristor-Based Lightweight Encryption
by: Siddiqi, Muhammad Ali, et al.
Published: (2024)

Spatial Spiking Neural Networks Enable Efficient and Robust Temporal Computation
by: Landsmeer, Lennart P. L., et al.
Published: (2025)

Guidance and Control Neural Network Acceleration using Memristors
by: Rudge, Zacharia A., et al.
Published: (2025)

EventQueues: Autodifferentiable spike event queues for brain simulation on AI accelerators
by: Landsmeer, Lennart P. L., et al.
Published: (2025)

Gradient Diffusion: Sensitivity-Matrix Co-Simulation Enables Activity Adaptation and Learnable Plasticity in Neural Simulators
by: Landsmeer, Lennart P. L., et al.
Published: (2024)

Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online Learning
by: Huijbregts, Lucas, et al.
Published: (2024)

High-Performance Data Mapping for BNNs on PCM-based Integrated Photonics
by: Shahroodi, Taha, et al.
Published: (2024)

Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENs
by: Rudge, Zacharia A., et al.
Published: (2025)

On the Excitability of Ultra-Low-Power CMOS Analog Spiking Neurons
by: Van Brandt, Léopold, et al.
Published: (2025)

Fair and Square: Replacing One Real Multiplication with a Single Square and One Complex Multiplication with Three Squares When Performing Matrix Multiplication and Convolutions
by: Liguori, Vincenzo
Published: (2026)

Lightweight Unified Sha-3/Shake Architecture with a Fault-Resilient State
by: Ewert, Christian, et al.
Published: (2025)

Shooting Neutrons at Neurons: Radiation Testing of a Spiking Neural Network on Flash-Based FPGAs
by: Nijsink, Wim, et al.
Published: (2026)

FireFly-S: Exploiting Dual-Side Sparsity for Spiking Neural Networks Acceleration with Reconfigurable Spatial Architecture
by: Li, Tenglong, et al.
Published: (2024)

FireFly-T: High-Throughput Sparsity Exploitation for Spiking Transformer Acceleration with Dual-Engine Overlay Architecture
by: Li, Tenglong, et al.
Published: (2025)

A Fully-Configurable Open-Source Software-Defined Digital Quantized Spiking Neural Core Architecture
by: Matinizadeh, Shadi, et al.
Published: (2024)

IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons
by: Szczerek, Wiktor J., et al.
Published: (2025)

Efficient and Lightweight In-memory Computing Architecture for Hardware Security
by: Ajmi, Hala, et al.
Published: (2022)

No Redundancy, No Stall: Lightweight Streaming 3D Gaussian Splatting for Real-time Rendering
by: Wei, Linye, et al.
Published: (2025)

ReDas: A Lightweight Architecture for Supporting Fine-Grained Reshaping and Multiple Dataflows on Systolic Array
by: Han, Meng, et al.
Published: (2023)

ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
by: Petrolo, Vincenzo, et al.
Published: (2025)

RealProbe: An Automated and Lightweight Performance Profiler for In-FPGA Execution of High-Level Synthesis Designs
by: Kim, Jiho, et al.
Published: (2025)

Architectural Classification of XR Workloads: Cross-Layer Archetypes and Implications
by: Shi, Xinyu, et al.
Published: (2026)

Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons
by: Ali, Asmer Hamid, et al.
Published: (2024)

Distributed Architecture for FPGA-based Superconducting Qubit Control
by: Fruitwala, Neelay, et al.
Published: (2024)

Hardware-Friendly Implementation of Physical Reservoir Computing with CMOS-based Time-domain Analog Spiking Neurons
by: Kimura, Nanako, et al.
Published: (2024)

FILCO: Flexible Composing Architecture with Real-Time Reconfigurability for DNN Acceleration
by: Chen, Xingzhen, et al.
Published: (2026)

SpikeStream: Accelerating Spiking Neural Network Inference on RISC-V Clusters with Sparse Computation Extensions
by: Manoni, Simone, et al.
Published: (2025)

UpANNS: Enhancing Billion-Scale ANNS Efficiency with Real-World PIM Architecture
by: Chen, Sitian, et al.
Published: (2024)

Ultra-Low-Power Spiking Neurons in 7 nm FinFET Technology: A Comparative Analysis of Leaky Integrate-and-Fire, Morris-Lecar, and Axon-Hillock Architectures
by: Larsh, Logan, et al.
Published: (2025)

Designing Silicon Brains using LLM: Leveraging ChatGPT for Automated Description of a Spiking Neuron Array
by: Tomlinson, Michael, et al.
Published: (2024)

SpikeX: Exploring Accelerator Architecture and Network-Hardware Co-Optimization for Sparse Spiking Neural Networks
by: Xu, Boxun, et al.
Published: (2025)

An Efficient Sparse Hardware Accelerator for Spike-Driven Transformer
by: Li, Zhengke, et al.
Published: (2025)

VUSA: Virtually Upscaled Systolic Array Architecture to Exploit Unstructured Sparsity in AI Acceleration
by: Helal, Shereef, et al.
Published: (2025)

Prosperity: Accelerating Spiking Neural Networks via Product Sparsity
by: Wei, Chiyue, et al.
Published: (2025)

Xpikeformer: Hybrid Analog-Digital Hardware Acceleration for Spiking Transformers
by: Song, Zihang, et al.
Published: (2024)

Evolutionary Approximation of Ternary Neurons for On-sensor Printed Neural Networks
by: Mrazek, Vojtech, et al.
Published: (2024)

MEEK: Re-thinking Heterogeneous Parallel Error Detection Architecture for Real-World OoO Superscalar Processors
by: Jiang, Zhe, et al.
Published: (2025)

NeuroRing: Scaling Spiking Neural Networks via Multi-FPGA Bidirectional Ring Topologies and Stream-Dataflow Architectures
by: Hafiz, Muhammad Ihsan Al, et al.
Published: (2026)

Learnable Sparsification of Die-to-Die Communication via Spike-Based Encoding
by: Nardone, Joshua, et al.
Published: (2025)

An Event-Driven Spiking Compute-In-Memory Macro based on SOT-MRAM
by: Yu, Deyang, et al.
Published: (2025)