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| Auteur principal: | |
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| Format: | Preprint |
| Publié: |
2023
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| Sujets: | |
| Accès en ligne: | https://arxiv.org/abs/2312.10426 |
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| _version_ | 1866910287023570944 |
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| author | Saveau, Alex |
| author_facet | Saveau, Alex |
| contents | Accurate branch prediction is a critical part of high performance instruction stream processing. In this paper, I present a hardware implementation of branch prediction for a RV32IM CPU, starting with static decode stage predictions and culminating in the use of BATAGE. In addition, I detail my experience writing the RTL in Hardcaml, a hardware description library for the functional programming language OCaml. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2312_10426 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | Branch Prediction in Hardcaml for a RISC-V 32im CPU Saveau, Alex Hardware Architecture Accurate branch prediction is a critical part of high performance instruction stream processing. In this paper, I present a hardware implementation of branch prediction for a RV32IM CPU, starting with static decode stage predictions and culminating in the use of BATAGE. In addition, I detail my experience writing the RTL in Hardcaml, a hardware description library for the functional programming language OCaml. |
| title | Branch Prediction in Hardcaml for a RISC-V 32im CPU |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2312.10426 |