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Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality with At-MRAM Neural Engine

Fuente: arXiv

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Détails bibliographiques
Auteurs principaux:	Prasad, Arpan Suravi, Scherer, Moritz, Conti, Francesco, Rossi, Davide, Di Mauro, Alfio, Eggimann, Manuel, Gómez, Jorge Tómas, Li, Ziyun, Sarwar, Syed Shakib, Wang, Zhao, De Salvo, Barbara, Benini, Luca
Format:	Preprint
Publié:	2023
Sujets:	Hardware Architecture
Accès en ligne:	Acceder al recurso
Tags:	Ajouter un tag Pas de tags, Soyez le premier à ajouter un tag!

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