RLPlanner: Reinforcement Learning based Floorplanning for Chiplets with Fast Thermal Analysis
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arXiv
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| Autori principali: | , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2023
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| _version_ | 1866909074753323008 |
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| author | Duan, Yuanyuan Liu, Xingchen Yu, Zhiping Wu, Hanming Shao, Leilai Zhu, Xiaolei |
| author_facet | Duan, Yuanyuan Liu, Xingchen Yu, Zhiping Wu, Hanming Shao, Leilai Zhu, Xiaolei |
| contents | Chiplet-based systems have gained significant attention in recent years due to their low cost and competitive performance. As the complexity and compactness of a chiplet-based system increase, careful consideration must be given to microbump assignments, interconnect delays, and thermal limitations during the floorplanning stage. This paper introduces RLPlanner, an efficient early-stage floorplanning tool for chiplet-based systems with a novel fast thermal evaluation method. RLPlanner employs advanced reinforcement learning to jointly minimize total wirelength and temperature. To alleviate the time-consuming thermal calculations, RLPlanner incorporates the developed fast thermal evaluation method to expedite the iterations and optimizations. Comprehensive experiments demonstrate that our proposed fast thermal evaluation method achieves a mean absolute error (MAE) of 0.25 K and delivers over 120x speed-up compared to the open-source thermal solver HotSpot. When integrated with our fast thermal evaluation method, RLPlanner achieves an average improvement of 20.28\% in minimizing the target objective (a combination of wirelength and temperature), within a similar running time, compared to the classic simulated annealing method with HotSpot. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2312_16895 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | RLPlanner: Reinforcement Learning based Floorplanning for Chiplets with Fast Thermal Analysis Duan, Yuanyuan Liu, Xingchen Yu, Zhiping Wu, Hanming Shao, Leilai Zhu, Xiaolei Machine Learning Hardware Architecture Chiplet-based systems have gained significant attention in recent years due to their low cost and competitive performance. As the complexity and compactness of a chiplet-based system increase, careful consideration must be given to microbump assignments, interconnect delays, and thermal limitations during the floorplanning stage. This paper introduces RLPlanner, an efficient early-stage floorplanning tool for chiplet-based systems with a novel fast thermal evaluation method. RLPlanner employs advanced reinforcement learning to jointly minimize total wirelength and temperature. To alleviate the time-consuming thermal calculations, RLPlanner incorporates the developed fast thermal evaluation method to expedite the iterations and optimizations. Comprehensive experiments demonstrate that our proposed fast thermal evaluation method achieves a mean absolute error (MAE) of 0.25 K and delivers over 120x speed-up compared to the open-source thermal solver HotSpot. When integrated with our fast thermal evaluation method, RLPlanner achieves an average improvement of 20.28\% in minimizing the target objective (a combination of wirelength and temperature), within a similar running time, compared to the classic simulated annealing method with HotSpot. |
| title | RLPlanner: Reinforcement Learning based Floorplanning for Chiplets with Fast Thermal Analysis |
| topic | Machine Learning Hardware Architecture |
| url | https://arxiv.org/abs/2312.16895 |