Darwin3: A large-scale neuromorphic chip with a Novel ISA and On-Chip Learning
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arXiv
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| Main Authors: | , , , , , , , , , , |
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| Format: | Preprint |
| Published: |
2023
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| _version_ | 1866909057081671680 |
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| author | Ma, De Jin, Xiaofei Sun, Shichun Li, Yitao Wu, Xundong Hu, Youneng Yang, Fangchao Tang, Huajin Zhu, Xiaolei Lin, Peng Pan, Gang |
| author_facet | Ma, De Jin, Xiaofei Sun, Shichun Li, Yitao Wu, Xundong Hu, Youneng Yang, Fangchao Tang, Huajin Zhu, Xiaolei Lin, Peng Pan, Gang |
| contents | Spiking Neural Networks (SNNs) are gaining increasing attention for their biological plausibility and potential for improved computational efficiency. To match the high spatial-temporal dynamics in SNNs, neuromorphic chips are highly desired to execute SNNs in hardware-based neuron and synapse circuits directly. This paper presents a large-scale neuromorphic chip named Darwin3 with a novel instruction set architecture(ISA), which comprises 10 primary instructions and a few extended instructions. It supports flexible neuron model programming and local learning rule designs. The Darwin3 chip architecture is designed in a mesh of computing nodes with an innovative routing algorithm. We used a compression mechanism to represent synaptic connections, significantly reducing memory usage. The Darwin3 chip supports up to 2.35 million neurons, making it the largest of its kind in neuron scale. The experimental results showed that code density was improved up to 28.3x in Darwin3, and neuron core fan-in and fan-out were improved up to 4096x and 3072x by connection compression compared to the physical memory depth. Our Darwin3 chip also provided memory saving between 6.8X and 200.8X when mapping convolutional spiking neural networks (CSNN) onto the chip, demonstrating state-of-the-art performance in accuracy and latency compared to other neuromorphic chips. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2312_17582 |
| institution | arXiv |
| publishDate | 2023 |
| record_format | arxiv |
| spellingShingle | Darwin3: A large-scale neuromorphic chip with a Novel ISA and On-Chip Learning Ma, De Jin, Xiaofei Sun, Shichun Li, Yitao Wu, Xundong Hu, Youneng Yang, Fangchao Tang, Huajin Zhu, Xiaolei Lin, Peng Pan, Gang Neural and Evolutionary Computing Hardware Architecture Spiking Neural Networks (SNNs) are gaining increasing attention for their biological plausibility and potential for improved computational efficiency. To match the high spatial-temporal dynamics in SNNs, neuromorphic chips are highly desired to execute SNNs in hardware-based neuron and synapse circuits directly. This paper presents a large-scale neuromorphic chip named Darwin3 with a novel instruction set architecture(ISA), which comprises 10 primary instructions and a few extended instructions. It supports flexible neuron model programming and local learning rule designs. The Darwin3 chip architecture is designed in a mesh of computing nodes with an innovative routing algorithm. We used a compression mechanism to represent synaptic connections, significantly reducing memory usage. The Darwin3 chip supports up to 2.35 million neurons, making it the largest of its kind in neuron scale. The experimental results showed that code density was improved up to 28.3x in Darwin3, and neuron core fan-in and fan-out were improved up to 4096x and 3072x by connection compression compared to the physical memory depth. Our Darwin3 chip also provided memory saving between 6.8X and 200.8X when mapping convolutional spiking neural networks (CSNN) onto the chip, demonstrating state-of-the-art performance in accuracy and latency compared to other neuromorphic chips. |
| title | Darwin3: A large-scale neuromorphic chip with a Novel ISA and On-Chip Learning |
| topic | Neural and Evolutionary Computing Hardware Architecture |
| url | https://arxiv.org/abs/2312.17582 |