Gate--Level Statistical Timing Analysis: Exact Solutions, Approximations and Algorithms
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arXiv
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| Autores principales: | , , |
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| Formato: | Preprint |
| Publicado: |
2024
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| Acceso en línea: | |
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| _version_ | 1866910289994186752 |
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| author | Mishagli, Dmytro Koskin, Eugene Blokhina, Elena |
| author_facet | Mishagli, Dmytro Koskin, Eugene Blokhina, Elena |
| contents | In this paper, the Statistical Static Timing Analysis (SSTA) is considered within the block--based approach. The statistical model of the logic gate delay propagation is systematically studied and the exact analytical solution is obtained, which is strongly non-Gaussian. The procedure of handling such (non-Gaussian) distributions is described and the corresponding algorithm for the critical path delay is outlined. Finally, the proposed approach is tested and compared with Monte Carlo simulations. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2401_03588 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Gate--Level Statistical Timing Analysis: Exact Solutions, Approximations and Algorithms Mishagli, Dmytro Koskin, Eugene Blokhina, Elena Systems and Control Hardware Architecture In this paper, the Statistical Static Timing Analysis (SSTA) is considered within the block--based approach. The statistical model of the logic gate delay propagation is systematically studied and the exact analytical solution is obtained, which is strongly non-Gaussian. The procedure of handling such (non-Gaussian) distributions is described and the corresponding algorithm for the critical path delay is outlined. Finally, the proposed approach is tested and compared with Monte Carlo simulations. |
| title | Gate--Level Statistical Timing Analysis: Exact Solutions, Approximations and Algorithms |
| topic | Systems and Control Hardware Architecture |
| url | https://arxiv.org/abs/2401.03588 |