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An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation

Fuente: arXiv

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Bibliographic Details
Main Authors:	Zhang, Weichuang, Zhao, Jieru, Shen, Guan, Chen, Quan, Chen, Chen, Guo, Minyi
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture Programming Languages
Online Access:	Acceder al recurso
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