Floating Point HUB Adder for RISC-V Sargantana Processor

Fuente: arXiv

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Bibliographic Details
Main Authors:	Bandera, Gerardo, Salamero, Javier, Moreto, Miquel, Villalba, Julio
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2401.09464