The quality assurance test of the SliT ASIC for the J-PARC muon $g-2$/EDM experiment
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arXiv
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| Main Authors: | , , , , , , , , , , , , |
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| Format: | Preprint |
| Published: |
2024
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| _version_ | 1866917572241260544 |
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| author | Yamanaka, Takashi Fujita, Yoichi Hamada, Eitaro Kishishita, Tetsuichi Mibe, Tsutomu Sato, Yutaro Seino, Yoshiaki Shoji, Masayoshi Suehara, Taikain Tanaka, Manobu M. Tojo, Junji Umebayashi, Keisuke Yoshioka, Tamaki |
| author_facet | Yamanaka, Takashi Fujita, Yoichi Hamada, Eitaro Kishishita, Tetsuichi Mibe, Tsutomu Sato, Yutaro Seino, Yoshiaki Shoji, Masayoshi Suehara, Taikain Tanaka, Manobu M. Tojo, Junji Umebayashi, Keisuke Yoshioka, Tamaki |
| contents | The SliT ASIC is a readout chip for the silicon strip detector to be used at the J-PARC muon $g-2$/EDM experiment. The production version of SliT128D was designed and mass production was finished. A quality assurance test method for bare SliT128D chips was developed to provide a sufficient number of chips for the experiment. The quality assurance test of the SliT128D chips was performed and 5735 chips were inspected. No defect was observed in chips of 84.3%. Accepting a few channels with poor time walk performance out of 128 channels per chip, more than 90% yield can be achieved, which is sufficient to construct the whole detector. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2401_11920 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | The quality assurance test of the SliT ASIC for the J-PARC muon $g-2$/EDM experiment Yamanaka, Takashi Fujita, Yoichi Hamada, Eitaro Kishishita, Tetsuichi Mibe, Tsutomu Sato, Yutaro Seino, Yoshiaki Shoji, Masayoshi Suehara, Taikain Tanaka, Manobu M. Tojo, Junji Umebayashi, Keisuke Yoshioka, Tamaki Instrumentation and Detectors High Energy Physics - Experiment The SliT ASIC is a readout chip for the silicon strip detector to be used at the J-PARC muon $g-2$/EDM experiment. The production version of SliT128D was designed and mass production was finished. A quality assurance test method for bare SliT128D chips was developed to provide a sufficient number of chips for the experiment. The quality assurance test of the SliT128D chips was performed and 5735 chips were inspected. No defect was observed in chips of 84.3%. Accepting a few channels with poor time walk performance out of 128 channels per chip, more than 90% yield can be achieved, which is sufficient to construct the whole detector. |
| title | The quality assurance test of the SliT ASIC for the J-PARC muon $g-2$/EDM experiment |
| topic | Instrumentation and Detectors High Energy Physics - Experiment |
| url | https://arxiv.org/abs/2401.11920 |