Computing with Clocks
Fuente:
arXiv
Saved in:
| Main Authors: | Edwards, Jonathan, Yakovlev, Alex, O'Keefe, Simon |
|---|---|
| Format: | Preprint |
| Published: |
2024
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock
by: Choi, Suhyeong, et al.
Published: (2024)
by: Choi, Suhyeong, et al.
Published: (2024)
Computing High-Degree Polynomial Gradients in Memory
by: Bhattacharya, T., et al.
Published: (2024)
by: Bhattacharya, T., et al.
Published: (2024)
Fault-Free Analog Computing with Imperfect Hardware
by: Xu, Zhicheng, et al.
Published: (2025)
by: Xu, Zhicheng, et al.
Published: (2025)
Hybrid Temporal Computing for Lower Power Hardware Accelerators
by: Tasnim, Maliha, et al.
Published: (2024)
by: Tasnim, Maliha, et al.
Published: (2024)
FPIA: Field-Programmable Ising Arrays with In-Memory Computing
by: Hutchinson, George Higgins, et al.
Published: (2024)
by: Hutchinson, George Higgins, et al.
Published: (2024)
PEARL: Power- and Energy-Aware Multicore Intermittent Computing
by: Akhunov, Khakim, et al.
Published: (2025)
by: Akhunov, Khakim, et al.
Published: (2025)
All-in-Memory Stochastic Computing using ReRAM
by: de Lima, João Paulo C., et al.
Published: (2025)
by: de Lima, João Paulo C., et al.
Published: (2025)
MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation
by: Qian, Xingyue, et al.
Published: (2024)
by: Qian, Xingyue, et al.
Published: (2024)
PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
by: Chen, Zhiyu, et al.
Published: (2024)
by: Chen, Zhiyu, et al.
Published: (2024)
Bayes2IMC: In-Memory Computing for Bayesian Binary Neural Networks
by: Katti, Prabodh, et al.
Published: (2024)
by: Katti, Prabodh, et al.
Published: (2024)
Antiferromagnetic Tunnel Junctions (AFMTJs) for In-Memory Computing: Modeling and Case Study
by: Choudhary, Yousuf, et al.
Published: (2026)
by: Choudhary, Yousuf, et al.
Published: (2026)
Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
by: Chen, Guan-Cheng, et al.
Published: (2025)
by: Chen, Guan-Cheng, et al.
Published: (2025)
Cognition Engines: A Row-Scale HVDC Architecture for Computational Continuity of AI
by: Churnock, Paul
Published: (2025)
by: Churnock, Paul
Published: (2025)
Partially-Precise Computing Paradigm for Efficient Hardware Implementation of Application-Specific Embedded Systems
by: Faryabi, Mohsen, et al.
Published: (2024)
by: Faryabi, Mohsen, et al.
Published: (2024)
XL-HD: Extended Learning in Hyperdimensional Computing via Deterministic Projections for In-Memory Accelerators
by: Moon, Sabrina Hassan, et al.
Published: (2026)
by: Moon, Sabrina Hassan, et al.
Published: (2026)
Scalable Digital Compute-in-Memory Ising Machines for Robustness Verification of Binary Neural Networks
by: Vadlamani, Madhav, et al.
Published: (2026)
by: Vadlamani, Madhav, et al.
Published: (2026)
Stoch-IMC: A Bit-Parallel Stochastic In-Memory Computing Architecture Based on STT-MRAM
by: Hajisadeghi, Amir M., et al.
Published: (2024)
by: Hajisadeghi, Amir M., et al.
Published: (2024)
Evaluating Computing Platforms for Sustainability: A Comparative Analysis of FPGAs against ASICs, GPUs, and CPUs
by: Sudarshan, Chetan Choppali, et al.
Published: (2026)
by: Sudarshan, Chetan Choppali, et al.
Published: (2026)
A Novel 8T SRAM-Based In-Memory Computing Architecture for MAC-Derived Logical Functions
by: M, Amogh K, et al.
Published: (2025)
by: M, Amogh K, et al.
Published: (2025)
ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar
by: Lai, Yu-Hong, et al.
Published: (2025)
by: Lai, Yu-Hong, et al.
Published: (2025)
TetrisG-SDK: Efficient Convolutional Layer Mapping with Adaptive Windows and Grouped Convolutions for Fast In-Memory Computing
by: Dong, Ke, et al.
Published: (2026)
by: Dong, Ke, et al.
Published: (2026)
Single-Cell Universal Logic-in-Memory Using 2T-nC FeRAM: An Area and Energy-Efficient Approach for Bulk Bitwise Computation
by: Biswas, Rudra, et al.
Published: (2025)
by: Biswas, Rudra, et al.
Published: (2025)
A Reconfigurable Time-Domain In-Memory Computing Macro using FeFET-Based CAM with Multilevel Delay Calibration in 28 nm CMOS
by: Mattar, Jeries, et al.
Published: (2025)
by: Mattar, Jeries, et al.
Published: (2025)
Count2Multiply: Reliable In-Memory High-Radix Counting
by: de Lima, João Paulo Cardoso, et al.
Published: (2024)
by: de Lima, João Paulo Cardoso, et al.
Published: (2024)
Reservoir Computing with Magnetic Thin Films
by: Dale, Matthew, et al.
Published: (2021)
by: Dale, Matthew, et al.
Published: (2021)
High-Performance Data Mapping for BNNs on PCM-based Integrated Photonics
by: Shahroodi, Taha, et al.
Published: (2024)
by: Shahroodi, Taha, et al.
Published: (2024)
Tekum: Balanced Ternary Tapered Precision Real Arithmetic
by: Hunhold, Laslo
Published: (2025)
by: Hunhold, Laslo
Published: (2025)
A WASM-Subset Stack Architecture for Low-cost FPGAs using Open-Source EDA Flows
by: Chakrabarti, Aradhya
Published: (2025)
by: Chakrabarti, Aradhya
Published: (2025)
Architecting Long-Context LLM Acceleration with Packing-Prefetch Scheduler and Ultra-Large Capacity On-Chip Memories
by: Lee, Ming-Yen, et al.
Published: (2025)
by: Lee, Ming-Yen, et al.
Published: (2025)
Time Domain Near Memory Computing Engine
by: Antal, Sarthak, et al.
Published: (2026)
by: Antal, Sarthak, et al.
Published: (2026)
SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum-Flux-Parametron Superconducting Circuits
by: Xie, Yanyue, et al.
Published: (2024)
by: Xie, Yanyue, et al.
Published: (2024)
Everything You Wanted to Know About Consumer Light Management in Smart Energy
by: Mohanty, Prajnyajit, et al.
Published: (2024)
by: Mohanty, Prajnyajit, et al.
Published: (2024)
Apparate: Evading Memory Hierarchy with GodSpeed Wireless-on-Chip
by: GS, Nitesh Narayana, et al.
Published: (2024)
by: GS, Nitesh Narayana, et al.
Published: (2024)
A 5T-2MTJ STT-assisted Spin Orbit Torque based Ternary Content Addressable Memory for Hardware Accelerators
by: Narla, Siri, et al.
Published: (2024)
by: Narla, Siri, et al.
Published: (2024)
WAGONN: Weight Bit Agglomeration in Crossbar Arrays for Reduced Impact of Interconnect Resistance on DNN Inference Accuracy
by: Victor, Jeffry, et al.
Published: (2024)
by: Victor, Jeffry, et al.
Published: (2024)
Architecture-Level Modeling of Photonic Deep Neural Network Accelerators
by: Andrulis, Tanner, et al.
Published: (2024)
by: Andrulis, Tanner, et al.
Published: (2024)
Online Soft Error Tolerance in ReRAM Crossbars for Deep Learning Accelerators
by: Khezeli, Benyamin, et al.
Published: (2024)
by: Khezeli, Benyamin, et al.
Published: (2024)
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors
by: Nair, Harideep, et al.
Published: (2024)
by: Nair, Harideep, et al.
Published: (2024)
LAAG-RV: LLM Assisted Assertion Generation for RTL Design Verification
by: Maddala, Karthik, et al.
Published: (2024)
by: Maddala, Karthik, et al.
Published: (2024)
Cross-layer Modeling and Design of Content Addressable Memories in Advanced Technology Nodes for Similarity Search
by: Narla, Siri, et al.
Published: (2024)
by: Narla, Siri, et al.
Published: (2024)
Similar Items
-
Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock
by: Choi, Suhyeong, et al.
Published: (2024) -
Computing High-Degree Polynomial Gradients in Memory
by: Bhattacharya, T., et al.
Published: (2024) -
Fault-Free Analog Computing with Imperfect Hardware
by: Xu, Zhicheng, et al.
Published: (2025) -
Hybrid Temporal Computing for Lower Power Hardware Accelerators
by: Tasnim, Maliha, et al.
Published: (2024) -
FPIA: Field-Programmable Ising Arrays with In-Memory Computing
by: Hutchinson, George Higgins, et al.
Published: (2024)