Sensing in Bi-Static ISAC Systems with Clock Asynchronism: A Signal Processing Perspective

Fuente: arXiv
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Auteurs principaux: Wu, Kai, Pegoraro, Jacopo, Meneghello, Francesca, Zhang, J. Andrew, Lacruz, Jesus O., Widmer, Joerg, Restuccia, Francesco, Rossi, Michele, Huang, Xiaojing, Zhang, Daqing, Caire, Giuseppe, Guo, Y. Jay
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Publié: 2024
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author Wu, Kai
Pegoraro, Jacopo
Meneghello, Francesca
Zhang, J. Andrew
Lacruz, Jesus O.
Widmer, Joerg
Restuccia, Francesco
Rossi, Michele
Huang, Xiaojing
Zhang, Daqing
Caire, Giuseppe
Guo, Y. Jay
author_facet Wu, Kai
Pegoraro, Jacopo
Meneghello, Francesca
Zhang, J. Andrew
Lacruz, Jesus O.
Widmer, Joerg
Restuccia, Francesco
Rossi, Michele
Huang, Xiaojing
Zhang, Daqing
Caire, Giuseppe
Guo, Y. Jay
contents Integrated Sensing and Communication (ISAC) has been identified as a pillar usage scenario for the impending 6G era. Bi-static sensing, a major type of sensing in ISAC, is promising to expedite ISAC in the near future, as it requires minimal changes to the existing network infrastructure. However, a critical challenge for bi-static sensing is clock asynchronism due to the use of different clocks at far-separated transmitters and receivers. This causes the received signal to be affected by time-varying random phase offsets, severely degrading, or even failing, direct sensing. Hence, to effectively enable ISAC, considerable research has been directed toward addressing the clock asynchronism issue in bi-static sensing. This paper provides an overview of the issue and existing techniques developed in an ISAC background. Based on the review and comparison, we also draw insights into the future research directions and open problems, aiming to nurture the maturation of bi-static sensing in ISAC.
format Preprint
id arxiv_https___arxiv_org_abs_2402_09048
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle Sensing in Bi-Static ISAC Systems with Clock Asynchronism: A Signal Processing Perspective
Wu, Kai
Pegoraro, Jacopo
Meneghello, Francesca
Zhang, J. Andrew
Lacruz, Jesus O.
Widmer, Joerg
Restuccia, Francesco
Rossi, Michele
Huang, Xiaojing
Zhang, Daqing
Caire, Giuseppe
Guo, Y. Jay
Signal Processing
Integrated Sensing and Communication (ISAC) has been identified as a pillar usage scenario for the impending 6G era. Bi-static sensing, a major type of sensing in ISAC, is promising to expedite ISAC in the near future, as it requires minimal changes to the existing network infrastructure. However, a critical challenge for bi-static sensing is clock asynchronism due to the use of different clocks at far-separated transmitters and receivers. This causes the received signal to be affected by time-varying random phase offsets, severely degrading, or even failing, direct sensing. Hence, to effectively enable ISAC, considerable research has been directed toward addressing the clock asynchronism issue in bi-static sensing. This paper provides an overview of the issue and existing techniques developed in an ISAC background. Based on the review and comparison, we also draw insights into the future research directions and open problems, aiming to nurture the maturation of bi-static sensing in ISAC.
title Sensing in Bi-Static ISAC Systems with Clock Asynchronism: A Signal Processing Perspective
topic Signal Processing
url https://arxiv.org/abs/2402.09048