The Vienna Architecture Description Language

Fuente: arXiv
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Bibliographic Details
Main Authors: Freitag, Florian, Halder, Linus, Himmelbauer, Simon, Hochrainer, Christoph, Huber, Benedikt, Kasper, Benjamin, Mischkulnig, Niklas, Nestler, Michael, Paulweber, Philipp, Per, Kevin, Raschhofer, Matthias, Ripar, Alexander, Schwarzinger, Tobias, Zottele, Johannes, Krall, Andreas
Format: Preprint
Published: 2024
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author Freitag, Florian
Halder, Linus
Himmelbauer, Simon
Hochrainer, Christoph
Huber, Benedikt
Kasper, Benjamin
Mischkulnig, Niklas
Nestler, Michael
Paulweber, Philipp
Per, Kevin
Raschhofer, Matthias
Ripar, Alexander
Schwarzinger, Tobias
Zottele, Johannes
Krall, Andreas
author_facet Freitag, Florian
Halder, Linus
Himmelbauer, Simon
Hochrainer, Christoph
Huber, Benedikt
Kasper, Benjamin
Mischkulnig, Niklas
Nestler, Michael
Paulweber, Philipp
Per, Kevin
Raschhofer, Matthias
Ripar, Alexander
Schwarzinger, Tobias
Zottele, Johannes
Krall, Andreas
contents The Vienna Architecture Description Language (VADL) is a powerful processor description language (PDL) that enables the concise formal specification of processor architectures. By utilizing a single VADL processor specification, the VADL system exhibits the capability to automatically generate a range of artifacts necessary for rapid design space exploration. These include assemblers, compilers, linkers, functional instruction set simulators, cycle-accurate instruction set simulators, synthesizable specifications in a hardware description language, as well as test cases and documentation. One distinctive feature of VADL lies in its separation of the instruction set architecture (ISA) specification and the microarchitecture (MiA) specification. This segregation allows users the flexibility to combine various ISAs with different MiAs, providing a versatile approach to processor design. In contrast to existing PDLs, VADL's MiA specification operates at a higher level of abstraction, enhancing the clarity and simplicity of the design process. Notably, with a single ISA specification, VADL streamlines compiler generation and maintenance by eliminating the need for intricate compiler-specific knowledge. The original VADL implementation has a restricted copyright. Therefore, the open source implementation OpenVADL was started. This article introduces VADL, compares the original VADL implementation with the ongoing OpenVADL implementation, describes the generator techniques in detail and demonstrates the power of the language and the performance of the generators in an empirical evaluation. The evaluation shows the expressiveness and conciseness of VADL and the efficiency of the generated artifacts.
format Preprint
id arxiv_https___arxiv_org_abs_2402_09087
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle The Vienna Architecture Description Language
Freitag, Florian
Halder, Linus
Himmelbauer, Simon
Hochrainer, Christoph
Huber, Benedikt
Kasper, Benjamin
Mischkulnig, Niklas
Nestler, Michael
Paulweber, Philipp
Per, Kevin
Raschhofer, Matthias
Ripar, Alexander
Schwarzinger, Tobias
Zottele, Johannes
Krall, Andreas
Programming Languages
The Vienna Architecture Description Language (VADL) is a powerful processor description language (PDL) that enables the concise formal specification of processor architectures. By utilizing a single VADL processor specification, the VADL system exhibits the capability to automatically generate a range of artifacts necessary for rapid design space exploration. These include assemblers, compilers, linkers, functional instruction set simulators, cycle-accurate instruction set simulators, synthesizable specifications in a hardware description language, as well as test cases and documentation. One distinctive feature of VADL lies in its separation of the instruction set architecture (ISA) specification and the microarchitecture (MiA) specification. This segregation allows users the flexibility to combine various ISAs with different MiAs, providing a versatile approach to processor design. In contrast to existing PDLs, VADL's MiA specification operates at a higher level of abstraction, enhancing the clarity and simplicity of the design process. Notably, with a single ISA specification, VADL streamlines compiler generation and maintenance by eliminating the need for intricate compiler-specific knowledge. The original VADL implementation has a restricted copyright. Therefore, the open source implementation OpenVADL was started. This article introduces VADL, compares the original VADL implementation with the ongoing OpenVADL implementation, describes the generator techniques in detail and demonstrates the power of the language and the performance of the generators in an empirical evaluation. The evaluation shows the expressiveness and conciseness of VADL and the efficiency of the generated artifacts.
title The Vienna Architecture Description Language
topic Programming Languages
url https://arxiv.org/abs/2402.09087