ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM
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arXiv
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| Main Authors: | , , , , , , , , |
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| Format: | Preprint |
| Published: |
2024
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| _version_ | 1866911781482397696 |
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| author | Ku, Jonathan Zhang, Junyao Shan, Haoxuan Samudrala, Saichand Wu, Jiawen Zheng, Qilin Li, Ziru Rajendran, JV Chen, Yiran |
| author_facet | Ku, Jonathan Zhang, Junyao Shan, Haoxuan Samudrala, Saichand Wu, Jiawen Zheng, Qilin Li, Ziru Rajendran, JV Chen, Yiran |
| contents | Elliptic curve cryptography (ECC) is widely used in security applications such as public key cryptography (PKC) and zero-knowledge proofs (ZKP). ECC is composed of modular arithmetic, where modular multiplication takes most of the processing time. Computational complexity and memory constraints of ECC limit the performance. Therefore, hardware acceleration on ECC is an active field of research. Processing-in-memory (PIM) is a promising approach to tackle this problem. In this work, we design ModSRAM, the first 8T SRAM PIM architecture to compute large-number modular multiplication efficiently. In addition, we propose R4CSA-LUT, a new algorithm that reduces the cycles for an interleaved algorithm and eliminates carry propagation for addition based on look-up tables (LUT). ModSRAM is co-designed with R4CSA-LUT to support modular multiplication and data reuse in memory with 52% cycle reduction compared to prior works with only 32% area overhead. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2402_14152 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM Ku, Jonathan Zhang, Junyao Shan, Haoxuan Samudrala, Saichand Wu, Jiawen Zheng, Qilin Li, Ziru Rajendran, JV Chen, Yiran Hardware Architecture Cryptography and Security Elliptic curve cryptography (ECC) is widely used in security applications such as public key cryptography (PKC) and zero-knowledge proofs (ZKP). ECC is composed of modular arithmetic, where modular multiplication takes most of the processing time. Computational complexity and memory constraints of ECC limit the performance. Therefore, hardware acceleration on ECC is an active field of research. Processing-in-memory (PIM) is a promising approach to tackle this problem. In this work, we design ModSRAM, the first 8T SRAM PIM architecture to compute large-number modular multiplication efficiently. In addition, we propose R4CSA-LUT, a new algorithm that reduces the cycles for an interleaved algorithm and eliminates carry propagation for addition based on look-up tables (LUT). ModSRAM is co-designed with R4CSA-LUT to support modular multiplication and data reuse in memory with 52% cycle reduction compared to prior works with only 32% area overhead. |
| title | ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM |
| topic | Hardware Architecture Cryptography and Security |
| url | https://arxiv.org/abs/2402.14152 |