Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
Fuente:
arXiv
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| Autori principali: | , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2024
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| Soggetti: | |
| Accesso online: | |
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| _version_ | 1866909118296489984 |
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| author | Ney, Jonas Matalla, Patrick Lauinger, Vincent Schmalen, Laurent Randel, Sebastian Wehn, Norbert |
| author_facet | Ney, Jonas Matalla, Patrick Lauinger, Vincent Schmalen, Laurent Randel, Sebastian Wehn, Norbert |
| contents | In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2402_15288 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications Ney, Jonas Matalla, Patrick Lauinger, Vincent Schmalen, Laurent Randel, Sebastian Wehn, Norbert Signal Processing Machine Learning In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system. |
| title | Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications |
| topic | Signal Processing Machine Learning |
| url | https://arxiv.org/abs/2402.15288 |