Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA
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arXiv
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| Format: | Preprint |
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2024
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| author | Carpentieri, Nicolò Sapriza, Juan Schiavone, Davide Pagliari, Daniele Jahier Atienza, David Martina, Maurizio Burrello, Alessio |
| author_facet | Carpentieri, Nicolò Sapriza, Juan Schiavone, Davide Pagliari, Daniele Jahier Atienza, David Martina, Maurizio Burrello, Alessio |
| contents | Recently, efficiently deploying deep learning solutions on the edge has received increasing attention. New platforms are emerging to support the increasing demand for flexibility and high performance. In this work, we explore the efficient mapping of convolutional layers on an open-hardware, low-power Coarse-Grain Reconfigurable Array (CGRA), namely OpenEdgeCGRA. We explore both direct implementations of convolution and solutions that transform it into a matrix multiplication through an Im2col transformation, and experiment with various tensor parallelism axes. We show that for this hardware target, direct convolution, coupled with weight parallelism reaches the best latency and energy efficiency, outperforming a CPU implementation by 3.4x and 9.9x in terms of energy and latency, respectively. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2403_01236 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA Carpentieri, Nicolò Sapriza, Juan Schiavone, Davide Pagliari, Daniele Jahier Atienza, David Martina, Maurizio Burrello, Alessio Hardware Architecture Recently, efficiently deploying deep learning solutions on the edge has received increasing attention. New platforms are emerging to support the increasing demand for flexibility and high performance. In this work, we explore the efficient mapping of convolutional layers on an open-hardware, low-power Coarse-Grain Reconfigurable Array (CGRA), namely OpenEdgeCGRA. We explore both direct implementations of convolution and solutions that transform it into a matrix multiplication through an Im2col transformation, and experiment with various tensor parallelism axes. We show that for this hardware target, direct convolution, coupled with weight parallelism reaches the best latency and energy efficiency, outperforming a CPU implementation by 3.4x and 9.9x in terms of energy and latency, respectively. |
| title | Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2403.01236 |