Improving Memory Dependence Prediction with Static Analysis
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arXiv
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| Main Authors: | , , , , , |
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| Format: | Preprint |
| Published: |
2024
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| _version_ | 1866917685311307776 |
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| author | Panayi, Luke Gandhi, Rohan Whittaker, Jim Chouliaras, Vassilios Berger, Martin Kelly, Paul |
| author_facet | Panayi, Luke Gandhi, Rohan Whittaker, Jim Chouliaras, Vassilios Berger, Martin Kelly, Paul |
| contents | This paper explores the potential of communicating information gained by static analysis from compilers to Out-of-Order (OoO) machines, focusing on the memory dependence predictor (MDP). The MDP enables loads to issue without all in-flight store addresses being known, with minimal memory order violations. We use LLVM to find loads with no dependencies and label them via their opcode. These labelled loads skip making lookups into the MDP, improving prediction accuracy by reducing false dependencies. We communicate this information in a minimally intrusive way, i.e.~without introducing additional hardware costs or instruction bandwidth, providing these improvements without any additional overhead in the CPU. We find that in select cases in Spec2017, a significant number of load instructions can skip interacting with the MDP and lead to a performance gain. These results point to greater possibilities for static analysis as a source of near zero cost performance gains in future CPU designs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2403_08056 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Improving Memory Dependence Prediction with Static Analysis Panayi, Luke Gandhi, Rohan Whittaker, Jim Chouliaras, Vassilios Berger, Martin Kelly, Paul Programming Languages Hardware Architecture B.0; B.8; C.1 This paper explores the potential of communicating information gained by static analysis from compilers to Out-of-Order (OoO) machines, focusing on the memory dependence predictor (MDP). The MDP enables loads to issue without all in-flight store addresses being known, with minimal memory order violations. We use LLVM to find loads with no dependencies and label them via their opcode. These labelled loads skip making lookups into the MDP, improving prediction accuracy by reducing false dependencies. We communicate this information in a minimally intrusive way, i.e.~without introducing additional hardware costs or instruction bandwidth, providing these improvements without any additional overhead in the CPU. We find that in select cases in Spec2017, a significant number of load instructions can skip interacting with the MDP and lead to a performance gain. These results point to greater possibilities for static analysis as a source of near zero cost performance gains in future CPU designs. |
| title | Improving Memory Dependence Prediction with Static Analysis |
| topic | Programming Languages Hardware Architecture B.0; B.8; C.1 |
| url | https://arxiv.org/abs/2403.08056 |