Cita APA (7a ed.)

Parikh, D., Li, S., Zhang, B., Kannan, R., Busart, C., & Prasanna, V. (2024). Accelerating ViT Inference on FPGA through Static and Dynamic Pruning.

Cita Chicago Style (17a ed.)

Parikh, Dhruv, Shouyi Li, Bingyi Zhang, Rajgopal Kannan, Carl Busart, y Viktor Prasanna. Accelerating ViT Inference on FPGA Through Static and Dynamic Pruning. 2024.

Cita MLA (9a ed.)

Parikh, Dhruv, et al. Accelerating ViT Inference on FPGA Through Static and Dynamic Pruning. 2024.