Copertina

Accelerating ViT Inference on FPGA through Static and Dynamic Pruning

Fuente: arXiv

Salvato in:

Dettagli Bibliografici
Autori principali:	Parikh, Dhruv, Li, Shouyi, Zhang, Bingyi, Kannan, Rajgopal, Busart, Carl, Prasanna, Viktor
Natura:	Preprint
Pubblicazione:	2024
Soggetti:	Distributed, Parallel, and Cluster Computing Hardware Architecture Computer Vision and Pattern Recognition
Accesso online:	Acceder al recurso
Tags:	Aggiungi Tag Nessun Tag, puoi essere il primo ad aggiungerne!!

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