Exploring Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators

Fuente: arXiv

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Bibliographic Details
Main Authors:	Klhufek, Jan, Safar, Miroslav, Mrazek, Vojtech, Vasicek, Zdenek, Sekanina, Lukas
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture Machine Learning
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2404.05368