DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism
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arXiv
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| Autori principali: | , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2024
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| _version_ | 1866917652415381504 |
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| author | Zhou, Ranyang Liu, Jacqueline T. Kochar, Nakul Ahmed, Sabbir Rakin, Adnan Siraj Angizi, Shaahin |
| author_facet | Zhou, Ranyang Liu, Jacqueline T. Kochar, Nakul Ahmed, Sabbir Rakin, Adnan Siraj Angizi, Shaahin |
| contents | RowHammer stands out as a prominent example, potentially the pioneering one, showcasing how a failure mechanism at the circuit level can give rise to a significant and pervasive security vulnerability within systems. Prior research has approached RowHammer attacks within a static threat model framework. Nonetheless, it warrants consideration within a more nuanced and dynamic model. This paper presents a low-overhead DRAM RowHammer vulnerability profiling technique termed DRAM-Profiler, which utilizes innovative test vectors for categorizing memory cells into distinct security levels. The proposed test vectors intentionally weaken the spatial correlation between the aggressors and victim rows before an attack for evaluation, thus aiding designers in mitigating RowHammer vulnerabilities in the mapping phase. While there has been no previous research showcasing the impact of such profiling to our knowledge, our study methodically assesses 128 commercial DDR4 DRAM products. The results uncover the significant variability among chips from different manufacturers in the type and quantity of RowHammer attacks that can be exploited by adversaries. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2404_18396 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism Zhou, Ranyang Liu, Jacqueline T. Kochar, Nakul Ahmed, Sabbir Rakin, Adnan Siraj Angizi, Shaahin Cryptography and Security Hardware Architecture RowHammer stands out as a prominent example, potentially the pioneering one, showcasing how a failure mechanism at the circuit level can give rise to a significant and pervasive security vulnerability within systems. Prior research has approached RowHammer attacks within a static threat model framework. Nonetheless, it warrants consideration within a more nuanced and dynamic model. This paper presents a low-overhead DRAM RowHammer vulnerability profiling technique termed DRAM-Profiler, which utilizes innovative test vectors for categorizing memory cells into distinct security levels. The proposed test vectors intentionally weaken the spatial correlation between the aggressors and victim rows before an attack for evaluation, thus aiding designers in mitigating RowHammer vulnerabilities in the mapping phase. While there has been no previous research showcasing the impact of such profiling to our knowledge, our study methodically assesses 128 commercial DDR4 DRAM products. The results uncover the significant variability among chips from different manufacturers in the type and quantity of RowHammer attacks that can be exploited by adversaries. |
| title | DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism |
| topic | Cryptography and Security Hardware Architecture |
| url | https://arxiv.org/abs/2404.18396 |