A Spiking Neural Network Decoder for Implantable Brain Machine Interfaces and its Sparsity-aware Deployment on RISC-V Microcontrollers

Fuente: arXiv
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Main Authors: Liao, Jiawei, Toomey, Oscar, Wang, Xiaying, Widmer, Lars, Chestek, Cynthia A., Benini, Luca, Jang, Taekwang
Format: Preprint
Published: 2024
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author Liao, Jiawei
Toomey, Oscar
Wang, Xiaying
Widmer, Lars
Chestek, Cynthia A.
Benini, Luca
Jang, Taekwang
author_facet Liao, Jiawei
Toomey, Oscar
Wang, Xiaying
Widmer, Lars
Chestek, Cynthia A.
Benini, Luca
Jang, Taekwang
contents Implantable Brain-machine interfaces (BMIs) are promising for motor rehabilitation and mobility augmentation, and they demand accurate and energy-efficient algorithms. In this paper, we propose a novel spiking neural network (SNN) decoder for regression tasks for implantable BMIs. The SNN is trained with enhanced spatio-temporal backpropagation to fully leverage its capability to handle temporal problems. The proposed SNN decoder outperforms the state-of-the-art Kalman filter and artificial neural network (ANN) decoders in offline finger velocity decoding tasks. The decoder is deployed on a RISC-V-based hardware platform and optimized to exploit sparsity. The proposed implementation has an average power consumption of 0.50 mW in a duty-cycled mode. When conducting continuous inference without duty-cycling, it achieves an energy efficiency of 1.88 uJ per inference, which is 5.5X less than the baseline ANN. Additionally, the average decoding latency is 0.12 ms for each inference, which is 5.7X faster than the ANN implementation.
format Preprint
id arxiv_https___arxiv_org_abs_2405_02146
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle A Spiking Neural Network Decoder for Implantable Brain Machine Interfaces and its Sparsity-aware Deployment on RISC-V Microcontrollers
Liao, Jiawei
Toomey, Oscar
Wang, Xiaying
Widmer, Lars
Chestek, Cynthia A.
Benini, Luca
Jang, Taekwang
Signal Processing
Implantable Brain-machine interfaces (BMIs) are promising for motor rehabilitation and mobility augmentation, and they demand accurate and energy-efficient algorithms. In this paper, we propose a novel spiking neural network (SNN) decoder for regression tasks for implantable BMIs. The SNN is trained with enhanced spatio-temporal backpropagation to fully leverage its capability to handle temporal problems. The proposed SNN decoder outperforms the state-of-the-art Kalman filter and artificial neural network (ANN) decoders in offline finger velocity decoding tasks. The decoder is deployed on a RISC-V-based hardware platform and optimized to exploit sparsity. The proposed implementation has an average power consumption of 0.50 mW in a duty-cycled mode. When conducting continuous inference without duty-cycling, it achieves an energy efficiency of 1.88 uJ per inference, which is 5.5X less than the baseline ANN. Additionally, the average decoding latency is 0.12 ms for each inference, which is 5.7X faster than the ANN implementation.
title A Spiking Neural Network Decoder for Implantable Brain Machine Interfaces and its Sparsity-aware Deployment on RISC-V Microcontrollers
topic Signal Processing
url https://arxiv.org/abs/2405.02146