Architecture-Level Modeling of Photonic Deep Neural Network Accelerators
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arXiv
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| Main Authors: | Andrulis, Tanner, Chaudhry, Gohar Irfan, Suriyakumar, Vinith M., Emer, Joel S., Sze, Vivienne |
|---|---|
| Format: | Preprint |
| Published: |
2024
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| Subjects: | |
| Online Access: | |
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