Cover Image

NTTSuite: Number Theoretic Transform Benchmarks for Accelerating Encrypted Computation

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Ding, Juran, Liu, Yuanzhe, Sun, Lingbin, Reagen, Brandon
Format:	Preprint
Published:	2024
Subjects:	Cryptography and Security Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

SZKP: A Scalable Accelerator Architecture for Zero-Knowledge Proofs
by: Daftardar, Alhad, et al.
Published: (2024)

HF-NTT: Hazard-Free Dataflow Accelerator for Number Theoretic Transform
by: Meng, Xiangchen, et al.
Published: (2024)

zkPHIRE: A Programmable Accelerator for ZKPs over HIgh-degRee, Expressive Gates
by: Daftardar, Alhad, et al.
Published: (2025)

Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs
by: Daftardar, Alhad, et al.
Published: (2025)

CiFlow: Dataflow Analysis and Optimization of Key Switching for Homomorphic Encryption
by: Neda, Negar, et al.
Published: (2023)

GPU Acceleration of TFHE-Based High-Precision Nonlinear Layers for Encrypted LLM Inference
by: Chen, Guoci, et al.
Published: (2026)

Formal Verification of Secure Encrypted Virtualization
by: Weerasena, Hansika, et al.
Published: (2026)

SCE-NTT: A Hardware Accelerator for Number Theoretic Transform Using Superconductor Electronics
by: Razmkhah, Sasan, et al.
Published: (2025)

LaMoS: Enabling Efficient Large Number Modular Multiplication through SRAM-based CiM Acceleration
by: Li, Haomin, et al.
Published: (2025)

APINT: A Full-Stack Framework for Acceleration of Privacy-Preserving Inference of Transformers based on Garbled Circuits
by: Cho, Hyunjun, et al.
Published: (2025)

SoK: Fully Homomorphic Encryption Accelerators
by: Zhang, Junxue, et al.
Published: (2022)

DNA-HHE: Dual-mode Near-network Accelerator for Hybrid Homomorphic Encryption on the Edge
by: Zhao, Yifan, et al.
Published: (2025)

FLASH-FHE: A Heterogeneous Architecture for Fully Homomorphic Encryption Acceleration
by: Zhang, Junxue, et al.
Published: (2025)

Logistic Map Pseudo Random Number Generator in FPGA
by: Calderon, Mateo Jalen Andrew, et al.
Published: (2024)

Cost-Effective Optimization and Implementation of the CRT-Paillier Decryption Algorithm for Enhanced Performance
by: Huang, Zhengwu, et al.
Published: (2025)

On the Vulnerability of FHE Computation to Silent Data Corruption
by: Mu, Jianan, et al.
Published: (2026)

EFFACT: A Highly Efficient Full-Stack FHE Acceleration Platform
by: Huang, Yi, et al.
Published: (2025)

OFHE: An Electro-Optical Accelerator for Discretized TFHE
by: Zheng, Mengxin, et al.
Published: (2024)

Trinity: A General Purpose FHE Accelerator
by: Deng, Xianglong, et al.
Published: (2024)

An Efficient Algorithm for Modulus Operation and Its Hardware Implementation in Prime Number Calculation
by: Wijesinghe, W. A. Susantha
Published: (2024)

Attacking AI Accelerators by Leveraging Arithmetic Properties of Addition
by: Heidary, Masoud, et al.
Published: (2026)

REDACTOR: eFPGA Redaction for DNN Accelerator Security
by: Baddour, Yazan, et al.
Published: (2025)

Presto: Hardware Acceleration of Ciphers for Hybrid Homomorphic Encryption
by: Jeon, Yeonsoo, et al.
Published: (2025)

ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM
by: Ku, Jonathan, et al.
Published: (2024)

if-ZKP: Intel FPGA-Based Acceleration of Zero Knowledge Proofs
by: Butt, Shahzad Ahmad, et al.
Published: (2024)

GME: GPU-based Microarchitectural Extensions to Accelerate Homomorphic Encryption
by: Shivdikar, Kaustubh, et al.
Published: (2023)

FAME: FPGA Acceleration of Secure Matrix Multiplication with Homomorphic Encryption
by: Xu, Zhihan, et al.
Published: (2025)

Theodosian: A Deep Dive into Memory-Hierarchy-Centric FHE Acceleration
by: Choi, Wonseok, et al.
Published: (2025)

AMAZE: Accelerated MiMC Hardware Architecture for Zero-Knowledge Applications on the Edge
by: Ahmed, Anees, et al.
Published: (2024)

CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure
by: Kim, Sangpyo, et al.
Published: (2023)

BOLT: Bandwidth-Optimized Lightning-Fast Oblivious Map powered by Secure HBM Accelerators
by: Guo, Yitong, et al.
Published: (2025)

IVE: An Accelerator for Single-Server Private Information Retrieval Using Versatile Processing Elements
by: Kim, Sangpyo, et al.
Published: (2025)

ALLMod: Exploring $\underline{\mathbf{A}}$rea-Efficiency of $\underline{\mathbf{L}}$UT-based $\underline{\mathbf{L}}$arge Number $\underline{\mathbf{Mod}}$ular Reduction via Hybrid Workloads
by: Liu, Fangxin, et al.
Published: (2025)

PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption
by: Tan, Weihang, et al.
Published: (2023)

Understanding the Error Sensitivity of Privacy-Aware Computing
by: Mazzanti, Matías, et al.
Published: (2025)

Hardware-Friendly Randomization: Enabling Random-Access and Minimal Wiring in FHE Accelerators with Low Total Cost
by: Rosenfeld, Ilan, et al.
Published: (2026)

History-Aware Trajectory k-Anonymization Using an FPGA-Based Hardware Accelerator for Real-Time Location Services
by: Nakano, Hiroshi, et al.
Published: (2025)

Efficient and Lightweight In-memory Computing Architecture for Hardware Security
by: Ajmi, Hala, et al.
Published: (2022)

A Near-Cache Architectural Framework for Cryptographic Computing
by: Zhang, Jingyao, et al.
Published: (2025)

New Security Challenges Towards In-Sensor Computing Systems
by: Kajol, Mashrafi, et al.
Published: (2025)