Exploring and Evaluating Real-world CXL: Use Cases and System Adoption
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arXiv
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| Auteurs principaux: | , , , , , , |
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| Format: | Preprint |
| Publié: |
2024
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| _version_ | 1866917005566672896 |
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| author | Wang, Xi Liu, Jie Wu, Jianbo Yang, Shuangyan Ren, Jie Shankar, Bhanu Li, Dong |
| author_facet | Wang, Xi Liu, Jie Wu, Jianbo Yang, Shuangyan Ren, Jie Shankar, Bhanu Li, Dong |
| contents | Compute eXpress Link (CXL) is emerging as a promising memory interface technology. However, its performance characteristics remain largely unclear due to the limited availability of production hardware. Key questions include: What are the use cases for the CXL memory? What are the impacts of the CXL memory on application performance? How to use the CXL memory in combination with existing memory components? In this work, we study the performance of three genuine CXL memory-expansion cards from different vendors. We characterize the basic performance of the CXL memory, study how HPC applications and large language models (LLM) can benefit from the CXL memory, and study the interplay between memory tiering and page interleaving. We also propose a novel data object-level interleaving policy to match the interleaving policy with memory access patterns. Our findings reveal the challenges and opportunities of using the CXL memory. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2405_14209 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Exploring and Evaluating Real-world CXL: Use Cases and System Adoption Wang, Xi Liu, Jie Wu, Jianbo Yang, Shuangyan Ren, Jie Shankar, Bhanu Li, Dong Performance Hardware Architecture Distributed, Parallel, and Cluster Computing Compute eXpress Link (CXL) is emerging as a promising memory interface technology. However, its performance characteristics remain largely unclear due to the limited availability of production hardware. Key questions include: What are the use cases for the CXL memory? What are the impacts of the CXL memory on application performance? How to use the CXL memory in combination with existing memory components? In this work, we study the performance of three genuine CXL memory-expansion cards from different vendors. We characterize the basic performance of the CXL memory, study how HPC applications and large language models (LLM) can benefit from the CXL memory, and study the interplay between memory tiering and page interleaving. We also propose a novel data object-level interleaving policy to match the interleaving policy with memory access patterns. Our findings reveal the challenges and opportunities of using the CXL memory. |
| title | Exploring and Evaluating Real-world CXL: Use Cases and System Adoption |
| topic | Performance Hardware Architecture Distributed, Parallel, and Cluster Computing |
| url | https://arxiv.org/abs/2405.14209 |