Multi-qubit Lattice Surgery Scheduling
Fuente:
arXiv
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| Main Authors: | Silva, Allyson, Zhang, Xiangyi, Webb, Zak, Kramer, Mia, Yang, Chan Woo, Liu, Xiao, Lemieux, Jessica, Chen, Ka-Wai, Scherer, Artur, Ronagh, Pooya |
|---|---|
| Format: | Preprint |
| Published: |
2024
|
| Subjects: | |
| Online Access: | |
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