Optimizing Foundation Model Inference on a Many-tiny-core Open-source RISC-V Platform
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arXiv
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| Main Authors: | Potocnik, Viviane, Colagrande, Luca, Fischer, Tim, Bertaccini, Luca, Pagliari, Daniele Jahier, Burrello, Alessio, Benini, Luca |
|---|---|
| Format: | Preprint |
| Published: |
2024
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| Subjects: | |
| Online Access: | |
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