Designing Reconfigurable Interconnection Network of Heterogeneous Chiplets Using Kalman Filter
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arXiv
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| Main Authors: | , , , |
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| Format: | Preprint |
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2024
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| _version_ | 1866916269658210304 |
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| author | Biglari, Siamak Huang, Ruixiao Zhao, Hui Mohanty, Saraju |
| author_facet | Biglari, Siamak Huang, Ruixiao Zhao, Hui Mohanty, Saraju |
| contents | Heterogeneous chiplets have been proposed for accelerating high-performance computing tasks. Integrated inside one package, CPU and GPU chiplets can share a common interconnection network that can be implemented through the interposer. However, CPU and GPU applications have very different traffic patterns in general. Without effective management of the network resource, some chiplets can suffer significant performance degradation because the network bandwidth is taken away by communication-intensive applications. Therefore, techniques need to be developed to effectively manage the shared network resources. In a chiplet-based system, resource management needs to not only react in real-time but also be cost-efficient. In this work, we propose a reconfigurable network architecture, leveraging Kalman Filter to make accurate predictions on network resources needed by the applications and then adaptively change the resource allocation. Using our design, the network bandwidth can be fairly allocated to avoid starvation or performance degradation. Our evaluation results show that the proposed reconfigurable interconnection network can dynamically react to the changes in traffic demand of the chiplets and improve the system performance with low cost and design complexity. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2406_00568 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Designing Reconfigurable Interconnection Network of Heterogeneous Chiplets Using Kalman Filter Biglari, Siamak Huang, Ruixiao Zhao, Hui Mohanty, Saraju Hardware Architecture Heterogeneous chiplets have been proposed for accelerating high-performance computing tasks. Integrated inside one package, CPU and GPU chiplets can share a common interconnection network that can be implemented through the interposer. However, CPU and GPU applications have very different traffic patterns in general. Without effective management of the network resource, some chiplets can suffer significant performance degradation because the network bandwidth is taken away by communication-intensive applications. Therefore, techniques need to be developed to effectively manage the shared network resources. In a chiplet-based system, resource management needs to not only react in real-time but also be cost-efficient. In this work, we propose a reconfigurable network architecture, leveraging Kalman Filter to make accurate predictions on network resources needed by the applications and then adaptively change the resource allocation. Using our design, the network bandwidth can be fairly allocated to avoid starvation or performance degradation. Our evaluation results show that the proposed reconfigurable interconnection network can dynamically react to the changes in traffic demand of the chiplets and improve the system performance with low cost and design complexity. |
| title | Designing Reconfigurable Interconnection Network of Heterogeneous Chiplets Using Kalman Filter |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2406.00568 |