LMB: Augmenting PCIe Devices with CXL-Linked Memory Buffer
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arXiv
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| Format: | Preprint |
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2024
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| _version_ | 1866916273250631680 |
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| author | Wang, Jiapin Zhang, Xiangping Tang, Chenlei Chen, Xiang Lu, Tao |
| author_facet | Wang, Jiapin Zhang, Xiangping Tang, Chenlei Chen, Xiang Lu, Tao |
| contents | PCIe devices, such as SSDs and GPUs, are pivotal in modern data centers, and their value is set to grow amidst the emergence of AI and large models. However, these devices face onboard DRAM shortage issue due to internal space limitation, preventing accommodation of sufficient DRAM modules alongside flash or GPU processing chips. Current solutions either curb device-internal memory usage or supplement slower non-DRAM mediums, prove inadequate or performance-compromising. This paper introduces the Linked Memory Buffer (LMB), a scalable solution utilizing the CXL memory expander to tackle device onboard memory deficiencies. The low-latency of CXL enables LMB to utilize emerging DRAM memory expander to efficiently supplement device onboard DRAM with minimal impact on performance. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2406_02039 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | LMB: Augmenting PCIe Devices with CXL-Linked Memory Buffer Wang, Jiapin Zhang, Xiangping Tang, Chenlei Chen, Xiang Lu, Tao Hardware Architecture PCIe devices, such as SSDs and GPUs, are pivotal in modern data centers, and their value is set to grow amidst the emergence of AI and large models. However, these devices face onboard DRAM shortage issue due to internal space limitation, preventing accommodation of sufficient DRAM modules alongside flash or GPU processing chips. Current solutions either curb device-internal memory usage or supplement slower non-DRAM mediums, prove inadequate or performance-compromising. This paper introduces the Linked Memory Buffer (LMB), a scalable solution utilizing the CXL memory expander to tackle device onboard memory deficiencies. The low-latency of CXL enables LMB to utilize emerging DRAM memory expander to efficiently supplement device onboard DRAM with minimal impact on performance. |
| title | LMB: Augmenting PCIe Devices with CXL-Linked Memory Buffer |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2406.02039 |