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Bibliographic Details
Main Authors: Ahmad, Afzal, Du, Linfeng, Zhang, Wei
Format: Preprint
Published: 2024
Subjects:
Online Access:https://arxiv.org/abs/2406.02088
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author Ahmad, Afzal
Du, Linfeng
Zhang, Wei
author_facet Ahmad, Afzal
Du, Linfeng
Zhang, Wei
contents Matrix multiplication is a cornerstone operation in a wide array of scientific fields, including machine learning and computer graphics. The standard algorithm for matrix multiplication has a complexity of $\mathcal{O}(n^3)$ for $n\times n$ matrices. Strassen's algorithm improves this to $\mathcal{O}(n^{2.807})$, but its practicality is limited for small to medium matrix sizes due to the large number of additions it introduces. This paper presents a novel FPGA-based implementation of Strassen's algorithm that achieves superior speed over an optimized General Matrix Multiply (GeMM) implementation for matrices as small as $n=256$. Our design, tested extensively on two high-performance FPGA accelerators (Alveo U50 and U280) across various data types, matches or surpasses the performance of a highly optimized baseline across a range of matrix sizes.
format Preprint
id arxiv_https___arxiv_org_abs_2406_02088
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle Fast and Practical Strassen's Matrix Multiplication using FPGAs
Ahmad, Afzal
Du, Linfeng
Zhang, Wei
Hardware Architecture
C.1.3
Matrix multiplication is a cornerstone operation in a wide array of scientific fields, including machine learning and computer graphics. The standard algorithm for matrix multiplication has a complexity of $\mathcal{O}(n^3)$ for $n\times n$ matrices. Strassen's algorithm improves this to $\mathcal{O}(n^{2.807})$, but its practicality is limited for small to medium matrix sizes due to the large number of additions it introduces. This paper presents a novel FPGA-based implementation of Strassen's algorithm that achieves superior speed over an optimized General Matrix Multiply (GeMM) implementation for matrices as small as $n=256$. Our design, tested extensively on two high-performance FPGA accelerators (Alveo U50 and U280) across various data types, matches or surpasses the performance of a highly optimized baseline across a range of matrix sizes.
title Fast and Practical Strassen's Matrix Multiplication using FPGAs
topic Hardware Architecture
C.1.3
url https://arxiv.org/abs/2406.02088