PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training

Fuente: arXiv
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Auteurs principaux: Fang, Jiahao, Wang, Huizheng, Yang, Qize, Kong, Dehao, Dai, Xu, Deng, Jinyi, Hu, Yang, Yin, Shouyi
Format: Preprint
Publié: 2024
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author Fang, Jiahao
Wang, Huizheng
Yang, Qize
Kong, Dehao
Dai, Xu
Deng, Jinyi
Hu, Yang
Yin, Shouyi
author_facet Fang, Jiahao
Wang, Huizheng
Yang, Qize
Kong, Dehao
Dai, Xu
Deng, Jinyi
Hu, Yang
Yin, Shouyi
contents Deep learning (DL) models are piquing high interest and scaling at an unprecedented rate. To this end, a handful of tiled accelerators have been proposed to support such large-scale training tasks. However, these accelerators often incorporate numerous cores or tiles even extending to wafer-scale, substantial on-chip bandwidth, and distributed memory systems. This results in an exceedingly complex design space. Moreover, conducting actual training experiments to find optimal configurations is impractical due to time constraints. Hence, predicting the optimal mapping of various parallelisms to such tiled system architectures becomes crucial. In this study, leveraging an analysis of existing mainstream DL model training strategies, we introduce a performance simulator named PALM. PALM targets both the training and inference processes for tiled accelerators, aiming to inspire the design of current and future accelerators. Specifically, (i) we establish a scheduling mechanism among tiled accelerators based on an event-driven framework; (ii) we support user-configurable pipeline, tensor, and data parallelism on tiled accelerators, determining the absolute performance throughput under these parallelism strategies; (iii) we model the interaction of on-chip SRAM, NoC, and off-chip DRAM during operator execution. This work is available here: https://github.com/fangjh21/PALM.
format Preprint
id arxiv_https___arxiv_org_abs_2406_03868
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training
Fang, Jiahao
Wang, Huizheng
Yang, Qize
Kong, Dehao
Dai, Xu
Deng, Jinyi
Hu, Yang
Yin, Shouyi
Distributed, Parallel, and Cluster Computing
Deep learning (DL) models are piquing high interest and scaling at an unprecedented rate. To this end, a handful of tiled accelerators have been proposed to support such large-scale training tasks. However, these accelerators often incorporate numerous cores or tiles even extending to wafer-scale, substantial on-chip bandwidth, and distributed memory systems. This results in an exceedingly complex design space. Moreover, conducting actual training experiments to find optimal configurations is impractical due to time constraints. Hence, predicting the optimal mapping of various parallelisms to such tiled system architectures becomes crucial. In this study, leveraging an analysis of existing mainstream DL model training strategies, we introduce a performance simulator named PALM. PALM targets both the training and inference processes for tiled accelerators, aiming to inspire the design of current and future accelerators. Specifically, (i) we establish a scheduling mechanism among tiled accelerators based on an event-driven framework; (ii) we support user-configurable pipeline, tensor, and data parallelism on tiled accelerators, determining the absolute performance throughput under these parallelism strategies; (iii) we model the interaction of on-chip SRAM, NoC, and off-chip DRAM during operator execution. This work is available here: https://github.com/fangjh21/PALM.
title PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training
topic Distributed, Parallel, and Cluster Computing
url https://arxiv.org/abs/2406.03868