A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems
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arXiv
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| Autori principali: | , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2024
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| _version_ | 1866913384086110208 |
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| author | Liang, Chaoqun Ottaviano, Alessandro Benz, Thomas Sinigaglia, Mattia Benini, Luca Garofalo, Angelo Rossi, Davide |
| author_facet | Liang, Chaoqun Ottaviano, Alessandro Benz, Thomas Sinigaglia, Mattia Benini, Luca Garofalo, Angelo Rossi, Davide |
| contents | The ongoing revolution in application domains targeting autonomous navigation, first and foremost automotive "zonalization", has increased the importance of certain off-chip communication interfaces, particularly Ethernet. The latter will play an essential role in next-generation vehicle architectures as the backbone connecting simultaneously and instantaneously the zonal/domain controllers. There is thereby an incumbent need to introduce a performant Ethernet controller in the open-source HW community, to be used as a proxy for architectural explorations and prototyping of mixed-criticality systems (MCSs). Driven by this trend, in this work, we propose a fully open-source, DMA-enhanced, technology-agnostic Gigabit Ethernet architecture that overcomes the limitations of existing open-source architectures, such as Lowrisc's Ethernet, often tied to FPGA implementation, performance-bound by sub-optimal design choices such as large memory buffers, and in general not mature enough to bridge the gap between academia and industry. Besides the area advantage, the proposed design increases packet transmission speed up to almost 3x compared to Lowrisc's and is validated through implementation and FPGA prototyping into two open-source, heterogeneous MCSs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2406_06394 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems Liang, Chaoqun Ottaviano, Alessandro Benz, Thomas Sinigaglia, Mattia Benini, Luca Garofalo, Angelo Rossi, Davide Hardware Architecture The ongoing revolution in application domains targeting autonomous navigation, first and foremost automotive "zonalization", has increased the importance of certain off-chip communication interfaces, particularly Ethernet. The latter will play an essential role in next-generation vehicle architectures as the backbone connecting simultaneously and instantaneously the zonal/domain controllers. There is thereby an incumbent need to introduce a performant Ethernet controller in the open-source HW community, to be used as a proxy for architectural explorations and prototyping of mixed-criticality systems (MCSs). Driven by this trend, in this work, we propose a fully open-source, DMA-enhanced, technology-agnostic Gigabit Ethernet architecture that overcomes the limitations of existing open-source architectures, such as Lowrisc's Ethernet, often tied to FPGA implementation, performance-bound by sub-optimal design choices such as large memory buffers, and in general not mature enough to bridge the gap between academia and industry. Besides the area advantage, the proposed design increases packet transmission speed up to almost 3x compared to Lowrisc's and is validated through implementation and FPGA prototyping into two open-source, heterogeneous MCSs. |
| title | A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2406.06394 |