Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies
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arXiv
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| Auteurs principaux: | , , , |
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| Format: | Preprint |
| Publié: |
2024
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| _version_ | 1866918035625869312 |
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| author | Pekkilä, Johannes Lappi, Oskar Robertsén, Fredrik Korpi-Lagg, Maarit J. |
| author_facet | Pekkilä, Johannes Lappi, Oskar Robertsén, Fredrik Korpi-Lagg, Maarit J. |
| contents | Over the last ten years, graphics processors have become the de facto accelerator for data-parallel tasks in various branches of high-performance computing, including machine learning and computational sciences. However, with the recent introduction of AMD-manufactured graphics processors to the world's fastest supercomputers, tuning strategies established for previous hardware generations must be re-evaluated. In this study, we evaluate the performance and energy efficiency of stencil computations on modern datacenter graphics processors, and propose a tuning strategy for fusing cache-heavy stencil kernels. The studied cases comprise both synthetic and practical applications, which involve the evaluation of linear and nonlinear stencil functions in one to three dimensions. Our experiments reveal that AMD and Nvidia graphics processors exhibit key differences in both hardware and software, necessitating platform-specific tuning to reach their full computational potential. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2406_08923 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies Pekkilä, Johannes Lappi, Oskar Robertsén, Fredrik Korpi-Lagg, Maarit J. Distributed, Parallel, and Cluster Computing 65Y10 (Primary), 35-04, 76W05, 85-08 (Secondary) G.4; I.3.1; G.1.8; D.1.3; D.3.4; J.2 Over the last ten years, graphics processors have become the de facto accelerator for data-parallel tasks in various branches of high-performance computing, including machine learning and computational sciences. However, with the recent introduction of AMD-manufactured graphics processors to the world's fastest supercomputers, tuning strategies established for previous hardware generations must be re-evaluated. In this study, we evaluate the performance and energy efficiency of stencil computations on modern datacenter graphics processors, and propose a tuning strategy for fusing cache-heavy stencil kernels. The studied cases comprise both synthetic and practical applications, which involve the evaluation of linear and nonlinear stencil functions in one to three dimensions. Our experiments reveal that AMD and Nvidia graphics processors exhibit key differences in both hardware and software, necessitating platform-specific tuning to reach their full computational potential. |
| title | Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies |
| topic | Distributed, Parallel, and Cluster Computing 65Y10 (Primary), 35-04, 76W05, 85-08 (Secondary) G.4; I.3.1; G.1.8; D.1.3; D.3.4; J.2 |
| url | https://arxiv.org/abs/2406.08923 |