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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2024
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2406.10282 |
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| _version_ | 1866913391776366592 |
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| author | Chenet, Cristiano Pegoraro Zhang, Ziteng Savino, Alessandro Di Carlo, Stefano |
| author_facet | Chenet, Cristiano Pegoraro Zhang, Ziteng Savino, Alessandro Di Carlo, Stefano |
| contents | This work evaluates how well hardware-based approaches detect stack buffer overflow (SBO) attacks in RISC-V systems. We conducted simulations on the PULP platform and examined micro-architecture events using semi-supervised anomaly detection techniques. The findings showed the challenge of detection performance. Thus, a potential solution combines software and hardware-based detectors concurrently, with hardware as the primary defense. The hardware-based approaches present compelling benefits that could enhance RISC-V-based architectures. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2406_10282 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Hardware-based stack buffer overflow attack detection on RISC-V architectures Chenet, Cristiano Pegoraro Zhang, Ziteng Savino, Alessandro Di Carlo, Stefano Cryptography and Security This work evaluates how well hardware-based approaches detect stack buffer overflow (SBO) attacks in RISC-V systems. We conducted simulations on the PULP platform and examined micro-architecture events using semi-supervised anomaly detection techniques. The findings showed the challenge of detection performance. Thus, a potential solution combines software and hardware-based detectors concurrently, with hardware as the primary defense. The hardware-based approaches present compelling benefits that could enhance RISC-V-based architectures. |
| title | Hardware-based stack buffer overflow attack detection on RISC-V architectures |
| topic | Cryptography and Security |
| url | https://arxiv.org/abs/2406.10282 |