NoX: a Compact Open-Source RISC-V Processor for Multi-Processor Systems-on-Chip
Fuente:
arXiv
Guardado en:
| Autores principales: | , , , , |
|---|---|
| Formato: | Preprint |
| Publicado: |
2024
|
| Materias: | |
| Acceso en línea: | |
| Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
| _version_ | 1866911933366534144 |
|---|---|
| author | Silva, Anderson I. Susin, Altamiro Kastensmidt, Fernanda L. Beck, Antonio Carlos S. Azambuja, Jose Rodrigo |
| author_facet | Silva, Anderson I. Susin, Altamiro Kastensmidt, Fernanda L. Beck, Antonio Carlos S. Azambuja, Jose Rodrigo |
| contents | IoT applications are one of the driving forces in making systems energy and power-efficient, given their resource constraints. However, because of security, latency, and transmission, we advocate for local computing through multi-processor systems-on-chip (MPSoCs) for edge computing. The RISC-V ISA has grown in academia and industry due to its flexibility. Still, available open-source cores cannot be seamlessly integrated into MPSoCs for a fast time to market. This paper presents NoX, a compact open-source plug-and-play 32-bit RISC-V core designed in System Verilog for efficient data processing in MPSoCs. NoX has a 4-stage single-issue in-order pipeline with full bypass, providing an efficient resource-constrained architecture. Compared to industry and academia resource-constrained RISC-V cores, NoX offers a better resource usage and performance trade-off. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2406_17878 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | NoX: a Compact Open-Source RISC-V Processor for Multi-Processor Systems-on-Chip Silva, Anderson I. Susin, Altamiro Kastensmidt, Fernanda L. Beck, Antonio Carlos S. Azambuja, Jose Rodrigo Hardware Architecture Computational Engineering, Finance, and Science IoT applications are one of the driving forces in making systems energy and power-efficient, given their resource constraints. However, because of security, latency, and transmission, we advocate for local computing through multi-processor systems-on-chip (MPSoCs) for edge computing. The RISC-V ISA has grown in academia and industry due to its flexibility. Still, available open-source cores cannot be seamlessly integrated into MPSoCs for a fast time to market. This paper presents NoX, a compact open-source plug-and-play 32-bit RISC-V core designed in System Verilog for efficient data processing in MPSoCs. NoX has a 4-stage single-issue in-order pipeline with full bypass, providing an efficient resource-constrained architecture. Compared to industry and academia resource-constrained RISC-V cores, NoX offers a better resource usage and performance trade-off. |
| title | NoX: a Compact Open-Source RISC-V Processor for Multi-Processor Systems-on-Chip |
| topic | Hardware Architecture Computational Engineering, Finance, and Science |
| url | https://arxiv.org/abs/2406.17878 |