ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search

Fuente: arXiv

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Bibliographic Details
Main Authors:	Bhandari, Jitendra, Chowdhury, Animesh Basak, Nabeel, Mohammed, Sinanoglu, Ozgur, Garg, Siddharth, Karri, Ramesh, Knechtel, Johann
Format:	Preprint
Published:	2024
Subjects:	Cryptography and Security Machine Learning
Online Access:	Acceder al recurso
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author	Bhandari, Jitendra Chowdhury, Animesh Basak Nabeel, Mohammed Sinanoglu, Ozgur Garg, Siddharth Karri, Ramesh Knechtel, Johann
author_facet	Bhandari, Jitendra Chowdhury, Animesh Basak Nabeel, Mohammed Sinanoglu, Ozgur Garg, Siddharth Karri, Ramesh Knechtel, Johann
contents	Power side-channel (PSC) analysis is pivotal for securing cryptographic hardware. Prior art focused on securing gate-level netlists obtained as-is from chip design automation, neglecting all the complexities and potential side-effects for security arising from the design automation process. That is, automation traditionally prioritizes power, performance, and area (PPA), sidelining security. We propose a "security-first" approach, refining the logic synthesis stage to enhance the overall resilience of PSC countermeasures. We introduce ASCENT, a learning-and-search-based framework that (i) drastically reduces the time for post-design PSC evaluation and (ii) explores the security-vs-PPA design space. Thus, ASCENT enables an efficient exploration of a large number of candidate netlists, leading to an improvement in PSC resilience compared to regular PPA-optimized netlists. ASCENT is up to 120x faster than traditional PSC analysis and yields a 3.11x improvement for PSC resilience of state-of-the-art PSC countermeasures
format	Preprint
id	arxiv_https___arxiv_org_abs_2406_19549
institution	arXiv
publishDate	2024
record_format	arxiv
spellingShingle	ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search Bhandari, Jitendra Chowdhury, Animesh Basak Nabeel, Mohammed Sinanoglu, Ozgur Garg, Siddharth Karri, Ramesh Knechtel, Johann Cryptography and Security Machine Learning Power side-channel (PSC) analysis is pivotal for securing cryptographic hardware. Prior art focused on securing gate-level netlists obtained as-is from chip design automation, neglecting all the complexities and potential side-effects for security arising from the design automation process. That is, automation traditionally prioritizes power, performance, and area (PPA), sidelining security. We propose a "security-first" approach, refining the logic synthesis stage to enhance the overall resilience of PSC countermeasures. We introduce ASCENT, a learning-and-search-based framework that (i) drastically reduces the time for post-design PSC evaluation and (ii) explores the security-vs-PPA design space. Thus, ASCENT enables an efficient exploration of a large number of candidate netlists, leading to an improvement in PSC resilience compared to regular PPA-optimized netlists. ASCENT is up to 120x faster than traditional PSC analysis and yields a 3.11x improvement for PSC resilience of state-of-the-art PSC countermeasures
title	ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search
topic	Cryptography and Security Machine Learning
url	https://arxiv.org/abs/2406.19549