Copertina

Hybrid Temporal Computing for Lower Power Hardware Accelerators

Fuente: arXiv

Salvato in:

Dettagli Bibliografici
Autori principali:	Tasnim, Maliha, Sachdeva, Sachin, Liu, Yibo, Tan, Sheldon X. -D.
Natura:	Preprint
Pubblicazione:	2024
Soggetti:	Hardware Architecture Emerging Technologies
Accesso online:	Acceder al recurso
Tags:	Aggiungi Tag Nessun Tag, puoi essere il primo ad aggiungerne!!

Documenti analoghi

Hardware Accelerators for Artificial Intelligence
di: Ahsan, S M Mojahidul, et al.
Pubblicazione: (2024)

Enhanced Hybrid Temporal Computing Using Deterministic Summations for Ultra-Low-Power Accelerators
di: Sachdeva, Sachin, et al.
Pubblicazione: (2025)

Fault-Free Analog Computing with Imperfect Hardware
di: Xu, Zhicheng, et al.
Pubblicazione: (2025)

Partially-Precise Computing Paradigm for Efficient Hardware Implementation of Application-Specific Embedded Systems
di: Faryabi, Mohsen, et al.
Pubblicazione: (2024)

A 5T-2MTJ STT-assisted Spin Orbit Torque based Ternary Content Addressable Memory for Hardware Accelerators
di: Narla, Siri, et al.
Pubblicazione: (2024)

PEARL: Power- and Energy-Aware Multicore Intermittent Computing
di: Akhunov, Khakim, et al.
Pubblicazione: (2025)

XL-HD: Extended Learning in Hyperdimensional Computing via Deterministic Projections for In-Memory Accelerators
di: Moon, Sabrina Hassan, et al.
Pubblicazione: (2026)

Computing High-Degree Polynomial Gradients in Memory
di: Bhattacharya, T., et al.
Pubblicazione: (2024)

CQ-CiM: Hardware-Aware Embedding Shaping for Robust CiM-Based Retrieval
di: Li, Xinzhao, et al.
Pubblicazione: (2026)

Accelerating Hybrid XOR$-$CNF Boolean Satisfiability Problems Natively with In-Memory Computing
di: Im, Haesol, et al.
Pubblicazione: (2025)

Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits
di: Chen, Yibo, et al.
Pubblicazione: (2025)

ANCoEF: Asynchronous Neuromorphic Algorithm/Hardware Co-Exploration Framework with a Fully Asynchronous Simulator
di: Zhang, Jian, et al.
Pubblicazione: (2024)

A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
di: Silvano, Cristina, et al.
Pubblicazione: (2023)

All-in-One Analog AI Hardware: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices
di: Falcone, Donato Francesco, et al.
Pubblicazione: (2025)

HAVEN: High-Bandwidth Flash Augmented Vector Engine for Large-Scale Approximate Nearest-Neighbor Search Acceleration
di: Hsu, Po-Kai, et al.
Pubblicazione: (2026)

Architecture-Level Modeling of Photonic Deep Neural Network Accelerators
di: Andrulis, Tanner, et al.
Pubblicazione: (2024)

Hardware-Efficient Photonic Tensor Core: Accelerating Deep Neural Networks with Structured Compression
di: Ning, Shupeng, et al.
Pubblicazione: (2025)

Online Soft Error Tolerance in ReRAM Crossbars for Deep Learning Accelerators
di: Khezeli, Benyamin, et al.
Pubblicazione: (2024)

ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks
di: Sedaghatgoo, Ali, et al.
Pubblicazione: (2024)

MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space
di: Leon, Vasileios, et al.
Pubblicazione: (2024)

Parallax: A Compiler for Neutral Atom Quantum Computers under Hardware Constraints
di: Ludmir, Jason, et al.
Pubblicazione: (2024)

Approximate Computing Survey, Part I: Terminology and Software & Hardware Approximation Techniques
di: Leon, Vasileios, et al.
Pubblicazione: (2023)

FPIA: Field-Programmable Ising Arrays with In-Memory Computing
di: Hutchinson, George Higgins, et al.
Pubblicazione: (2024)

All-in-Memory Stochastic Computing using ReRAM
di: de Lima, João Paulo C., et al.
Pubblicazione: (2025)

A Novel Low-Power Cache Architecture Based on 6-Transistor SRAM Cells
di: Dizabadi, Naser Khatti, et al.
Pubblicazione: (2026)

MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation
di: Qian, Xingyue, et al.
Pubblicazione: (2024)

PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
di: Chen, Zhiyu, et al.
Pubblicazione: (2024)

Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock
di: Choi, Suhyeong, et al.
Pubblicazione: (2024)

Bayes2IMC: In-Memory Computing for Bayesian Binary Neural Networks
di: Katti, Prabodh, et al.
Pubblicazione: (2024)

Antiferromagnetic Tunnel Junctions (AFMTJs) for In-Memory Computing: Modeling and Case Study
di: Choudhary, Yousuf, et al.
Pubblicazione: (2026)

Power-Area Efficient Serial IMPLY-based 4:2 Compressor Applied in Data-Intensive Applications
di: Bagheralmoosavi, Bahareh, et al.
Pubblicazione: (2024)

Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
di: Chen, Guan-Cheng, et al.
Pubblicazione: (2025)

Cognition Engines: A Row-Scale HVDC Architecture for Computational Continuity of AI
di: Churnock, Paul
Pubblicazione: (2025)

Toward Digital Twins in 3D IC Packaging: A Critical Review of Physics, Data, and Hybrid Architectures
di: Datta, Gourab, et al.
Pubblicazione: (2026)

Scalable Digital Compute-in-Memory Ising Machines for Robustness Verification of Binary Neural Networks
di: Vadlamani, Madhav, et al.
Pubblicazione: (2026)

Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits
di: Pallavi, CH., et al.
Pubblicazione: (2024)

Stoch-IMC: A Bit-Parallel Stochastic In-Memory Computing Architecture Based on STT-MRAM
di: Hajisadeghi, Amir M., et al.
Pubblicazione: (2024)

Evaluating Computing Platforms for Sustainability: A Comparative Analysis of FPGAs against ASICs, GPUs, and CPUs
di: Sudarshan, Chetan Choppali, et al.
Pubblicazione: (2026)

A Novel 8T SRAM-Based In-Memory Computing Architecture for MAC-Derived Logical Functions
di: M, Amogh K, et al.
Pubblicazione: (2025)

ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar
di: Lai, Yu-Hong, et al.
Pubblicazione: (2025)