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| Main Authors: | , , , , |
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| Format: | Preprint |
| Published: |
2024
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2407.11999 |
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| _version_ | 1866913434169245696 |
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| author | Sarda, Giuseppe M. Shah, Nimish Bhattacharjee, Debjyoti Debacker, Peter Verhelst, Marian |
| author_facet | Sarda, Giuseppe M. Shah, Nimish Bhattacharjee, Debjyoti Debacker, Peter Verhelst, Marian |
| contents | GPGPU execution analysis has always been tied to closed-source, proprietary benchmarking tools that provide high-level, non-exhaustive, and/or statistical information, preventing a thorough understanding of bottlenecks and optimization possibilities. Open-source hardware platforms offer opportunities to overcome such limits and co-optimize the full {hardware-mapping-algorithm} compute stack. Yet, so far, this has remained under-explored. In this work, we exploit micro-architecture parameter analysis to develop a hardware-aware, runtime mapping technique for OpenCL kernels on the open Vortex RISC-V GPGPU. Our method is based on trace observations and targets optimal hardware resource utilization to achieve superior performance and flexibility compared to hardware-agnostic mapping approaches. The technique was validated on different architectural GPU configurations across several OpenCL kernels. Overall, our approach significantly enhances the performance of the open-source Vortex GPGPU, contributing to unlocking its potential and usability. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2407_11999 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis Sarda, Giuseppe M. Shah, Nimish Bhattacharjee, Debjyoti Debacker, Peter Verhelst, Marian Hardware Architecture GPGPU execution analysis has always been tied to closed-source, proprietary benchmarking tools that provide high-level, non-exhaustive, and/or statistical information, preventing a thorough understanding of bottlenecks and optimization possibilities. Open-source hardware platforms offer opportunities to overcome such limits and co-optimize the full {hardware-mapping-algorithm} compute stack. Yet, so far, this has remained under-explored. In this work, we exploit micro-architecture parameter analysis to develop a hardware-aware, runtime mapping technique for OpenCL kernels on the open Vortex RISC-V GPGPU. Our method is based on trace observations and targets optimal hardware resource utilization to achieve superior performance and flexibility compared to hardware-agnostic mapping approaches. The technique was validated on different architectural GPU configurations across several OpenCL kernels. Overall, our approach significantly enhances the performance of the open-source Vortex GPGPU, contributing to unlocking its potential and usability. |
| title | Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2407.11999 |